Semiconductor Package Direct Bonding for Dense Die Integration

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing semiconductor packages face challenges in efficiently integrating multiple device dies with different technologies and functions while optimizing manufacturing cost and device performance.

Innovation Solution

A method of forming semiconductor packages through wafer-on-wafer and chip-on-wafer bonding, utilizing dielectric-to-dielectric and metal-to-metal bonding, and forming through-substrate vias to connect integrated circuits, reducing process steps and costs, and enabling smaller form factor and improved electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If traditional packaging methods with solder connections are used, then manufacturing process is simpler, but manufacturing cost increases and device performance decreases

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoidmanufacturing cost

Core Design Contradiction:

Ease of manufactureVSProductivity

Solution Approach 1:

The patent replaces traditional mechanical solder connections with direct die-to-substrate bonding. This eliminates the need for solder bumps and reflow processes, directly reducing manufacturing complexity while enabling lower costs through simplified process steps and reduced material requirements.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent extracts and removes the solder connection layer from the packaging structure. By eliminating the solder bump intermediate layer and using direct bonding, the manufacturing process is simplified and cost is reduced while maintaining electrical connectivity.

Inventive Principle:

Principle #2Taking out (Extraction)

2Ease of manufacture

If traditional packaging with solder connections is used, then manufacturing process is simpler, but electrical performance deteriorates

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoidelectrical performance

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent substitutes mechanical solder joints with direct semiconductor bonding. This eliminates solder-related electrical performance issues such as inductance, resistance, and reliability problems from thermal cycling, thereby improving electrical performance while simplifying the manufacturing process.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If device dies are packaged with spacing for traditional connections, then manufacturing is easier, but package size increases

Engineering Contradiction:

Improvemanufacturing easeVSAvoidpackage size

Core Design Contradiction:

Ease of manufactureVSVolume of moving object

Solution Approach 1:

The patent removes the intermediate solder bump structure and associated spacing requirements. By using direct bonding, devices can be placed closer together without the need for large solder bump pitch, thereby reducing overall package size while maintaining manufacturing feasibility.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transitions from a three-dimensional solder bump connection approach to a two-dimensional direct surface bonding approach. This dimensional change eliminates the need for vertical spacing accommodated by solder bumps, enabling tighter horizontal packing and smaller package footprint.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

4Reliability

If through-silicon vias are used for electrical connection, then device functionality is improved, but manufacturing complexity increases

Engineering Contradiction:

Improvedevice functionalityVSAvoidmanufacturing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary formation of conductive pathways and bonding structures on the substrate before device placement. This preliminary action enables through-silicon via functionality to be achieved through pre-formed conductive layers and vias, reducing the complexity of post-bonding manufacturing steps.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for reduced manufacturing costs, improved design flexibility, and enhanced electrical performance by directly bonding semiconductor devices to wafers without solder connections, achieving finer bump pitch, higher density interconnects, and lower power consumption.

Implementation Method 1

utilizing dielectric-to-dielectric and metal-to-metal bonding

Methodology Applied

Scientific EffectDielectric-to-dielectric bonding:

Implementation Method 2

utilizing dielectric-to-dielectric and metal-to-metal bonding

Methodology Applied

Scientific EffectMetal-to-metal bonding:

Data Source

PatentUS20250349788A1Semiconductor package and method

Publication Date: 2025.11.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method includes directly bonding a first wafer to a second wafer, wherein the bonding electrically connects a first interconnect structure of the first wafer to a second interconnect structure of the second wafer; directly bonding first semiconductor devices to the second wafer, wherein the bonding electrically connects the first semiconductor devices to the second interconnect structure; encapsulating the first semiconductor devices with a first encapsulant; and forming solder bumps over the first semiconductor devices.