Semiconductor Package Layout With Direct Substrate Coupling
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Solution Overview
Problem
Current semiconductor device packages with Package on Package (PoP) technology face challenges in reducing thickness and performance due to long circuit loops, which affect the efficiency of high-bandwidth connections between memory and logic devices.
Innovation Solution
The semiconductor device package design includes a first and second substrate with electronic components connected through a conductive via and redistribution layers, reducing the need for an interposer and shortening the circuit loop by using a conductive via and flip-chip connections to enhance electrical connectivity and reduce thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If Package on Package (PoP) technology is used to combine discrete packages, then device integration is improved, but circuit loop length increases and performance deteriorates
Solution Approach 1:
The patent extracts and eliminates the interposer component from the traditional PoP structure. By directly connecting the first and second substrates without an interposer, the circuit loop length is reduced while maintaining device integration benefits. This extraction of the unnecessary intermediate component resolves the contradiction between integration and performance.
Solution Approach 2:
The patent merges the functions of the interposer into the substrate structures themselves. The first and second substrates are directly coupled together, combining the support and connection functions that were previously separated across three components (first substrate, interposer, second substrate). This merging reduces the overall circuit loop length while maintaining integration.
2Adaptability or versatility
If traditional PoP structure with interposer is used, then device integration is achieved, but package thickness increases
Solution Approach 1:
The interposer is extracted and removed from the package structure. This elimination of the intermediate component directly reduces the package thickness while preserving the integrated device configuration. The first and second substrates are directly coupled, removing the thickness contribution of the interposer.
Solution Approach 2:
The structural support functions previously distributed across three components are merged into two directly coupled substrates. This consolidation reduces the overall package thickness while maintaining the integrated arrangement of electronic components.
3Adaptability or versatility
If interposer is used to connect substrates, then device integration is improved, but circuit loop length increases affecting high-bandwidth transmission
Solution Approach 1:
The interposer is extracted from the connection path between substrates. By removing this intermediate component, the electrical signal transmission path is shortened, reducing circuit loop length and improving high-bandwidth transmission efficiency while maintaining device integration.
Solution Approach 2:
The electrical connection functions are merged into a direct substrate-to-substrate coupling without intermediate components. This merging creates shorter current paths and reduces circuit loop length, thereby improving signal transmission speed and high-bandwidth performance.
Data Source
AI summary
A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.