Semiconductor Package Layout Using DTC Dies for Higher Capacitance Density
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Solution Overview
Problem
Existing semiconductor package structures have low integration density and performance due to inefficient use of substrate surface area, limiting the potential for improved capacitance and high-frequency signal stability.
Innovation Solution
The method involves bonding effective dies and deep trench capacitors (DTC) to a device substrate, forming interlayer dielectric and metal interconnect layers, and stacking additional DTC dies to fully utilize substrate surface area, enhancing integration and capacitance density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If dummy dies are bonded in the gaps of the device substrate to ensure bonding area and guarantee bonding strength, then bonding strength is improved, but substrate surface area utilization deteriorates
Solution Approach 1:
The patent extracts the dummy dies from the packaging structure and replaces them with deep trench capacitors (DTCs). This allows the substrate surface area to be fully utilized for functional components rather than being occupied by non-functional dummy dies, while still maintaining sufficient bonding area through the DTC structure itself.
Solution Approach 2:
The deep trench capacitors serve multiple functions: they provide capacitance for high-frequency signal stability, occupy substrate surface area that would otherwise be wasted, and contribute to bonding area. This multi-functionality resolves the contradiction by making the capacitive components serve both electrical and structural purposes.
2Quantity of substance
If substrate surface area is fully utilized by bonding effective dies only, then integration density is improved, but bonding area and bonding strength deteriorate
Solution Approach 1:
The deep trench capacitors are designed to serve dual purposes: as functional capacitive components for electrical performance and as space-occupying elements that contribute to overall substrate utilization. By bonding DTCs alongside effective dies, the patent achieves high integration density while maintaining sufficient total bonding area for mechanical strength.
Solution Approach 2:
The patent changes the parameter of substrate occupancy from purely structural (dummy dies) to functional (deep trench capacitors). This allows the same substrate area to provide both capacitance and bonding surface, simultaneously improving integration density and maintaining bonding strength.
3Quantity of substance
If deep trench capacitors are bonded to fully utilize substrate surface area, then capacitance density is improved, but device complexity increases
Solution Approach 1:
The patent merges the capacitance function with the substrate occupancy function by bonding deep trench capacitors directly to the device substrate. This integration eliminates the need for separate dummy structures and creates a unified packaging approach where capacitive components and substrate utilization are combined into a single solution.
Data Source
AI summary
The present invention relates to a chip packaging method and a semiconductor package structure. In the method, at least one effective die and at least one DTC die are bonded to a surface of a first device substrate at one side thereof, respectively, through bonding, the effective die is electrically connected to an electronic component in the first device substrate. The DTC die allows the surface of the first device substrate that is not occupied by the effective die to be fully utilized This helps increase both an integration density and a capacitance density of the resulting semiconductor package structure, increase its high-frequency signal stability and improve its performance. The semiconductor package structure is formed according to the above chip packaging method.