Semiconductor Package Bandwidth Extension via Dummy Pad Segmentation

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Solution Overview

Problem

Stacked semiconductor packages using through electrodes face limitations in bandwidth as signals can only be inputted simultaneously but not outputted simultaneously, restricting the bandwidth despite increased number of stacked chips.

Innovation Solution

The semiconductor package design includes first and second semiconductor chips stacked with through electrodes that electrically couple dummy pads and normal pads, allowing simultaneous input and output of signals, and a substrate with coupling pads to support these chips, enabling extended bandwidth without altering the existing pad layout.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If through electrodes are used to vertically pass through semiconductor chips for physical connection and electrical coupling, then mounting area utilization efficiency is improved and memory capacity is increased, but bandwidth remains fixed because signals cannot be simultaneously outputted from multiple chips

Engineering Contradiction:
ImprovebandwidthVSAvoidsignal output synchronization
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The invention divides the signal path into separate input and output paths by introducing dummy pads. Normal pads handle only input signals while dummy pads handle only output signals, allowing simultaneous input and output operations across multiple stacked chips without signal conflict

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Dummy pads act as intermediary elements that receive signals from through electrodes and transfer them to external terminals. This intermediary structure enables the decoupling of input and output signal flows, allowing independent simultaneous operation of input and output channels

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If the number of stacked semiconductor chips is increased to improve memory capacity, then mounting area utilization is improved, but bandwidth does not increase due to fixed signal output capability

Engineering Contradiction:
Improvememory capacityVSAvoidbandwidth
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

By segmenting the pad functions into normal pads for input and dummy pads for output, each stacked chip can independently handle both input and output operations simultaneously, allowing bandwidth to scale with the number of chips while maintaining high memory capacity

Inventive Principle:
Principle #1Segmentation

3Device complexity

If existing pad layout is maintained without changes, then design complexity and cost are reduced, but bandwidth extension capability is limited

Engineering Contradiction:
Improvepad layout designVSAvoidbandwidth
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The dummy pads are designed with the same structure and layout characteristics as normal pads, allowing them to be integrated into existing pad layouts without requiring separate design processes. This universal design approach enables bandwidth extension while maintaining compatibility with existing manufacturing and design workflows

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9177906B1Semiconductor package including an extended bandwidth
Publication Date: 2015.11.03 SK HYNIX INC
  • US9177906B1 patent drawing
  • US9177906B1 patent drawing
  • US9177906B1 patent drawing

AI summary

A semiconductor package may include first and second semiconductor chips stacked one upon the other, and each including, over a bottom surface thereof, first normal pads electrically coupled with first input/output circuits and first dummy pads located over the bottom surface of the first semiconductor chip. The semiconductor package may include first through electrodes passed through the first semiconductor chip, and electrically coupled to the first dummy pads of the first semiconductor chip and the first normal pads of the second semiconductor chip. The semiconductor package may include a substrate configured to support the bottom surface of the first semiconductor chip, and including first coupling pads electrically coupled with the first normal pads and the first dummy pads of the first semiconductor chip, respectively.