Semiconductor Package Grounding via Substrate Edge Contact

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The use of plated through holes in semiconductor packages occupies significant substrate space, limiting circuit layout flexibility and electrical performance.

Innovation Solution

A semiconductor package design that includes a substrate with a ground layer exposed through recessed portions, allowing a metal layer to connect the ground layer without the need for plated through holes, thereby saving space and enhancing circuit layout flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If plated through holes are used to ground the metal shield, then electromagnetic shielding function is achieved, but substrate space is occupied and circuit layout flexibility is limited

Engineering Contradiction:
Improveelectromagnetic shielding functionVSAvoidcircuit layout flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent transitions from vertical grounding through plated through holes (z-dimension) to lateral grounding through the edge of the substrate (x-y plane). The metal shield is grounded by extending to and making contact with the substrate edge, eliminating the need for vertical through-holes and enabling more flexible circuit layouts on the substrate surface.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts the grounding function from the interior substrate structure (plated through holes) and relocates it to the substrate edge. By removing the requirement for internal through-holes and using the substrate perimeter for grounding, the design frees up substrate space and improves layout flexibility while maintaining electromagnetic shielding effectiveness.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If plated through holes are used to connect the ground layer, then electrical grounding is achieved, but substrate space is consumed

Engineering Contradiction:
Improvegrounding connectionVSAvoidsubstrate space
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The grounding connection is moved from the vertical dimension (through-holes penetrating the substrate thickness) to the lateral dimension (edge contact on the substrate surface). This dimensional shift eliminates the need for space-consuming plated through holes while maintaining effective electrical grounding for the metal shield.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The grounding function is extracted from the substrate interior and relocated to the substrate edge. This extraction removes the need for plated through holes that consume valuable substrate space, allowing more area to be used for functional circuit elements while preserving the grounding connection.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design eliminates the need for plated through holes, conserving substrate space and improving circuit layout flexibility while maintaining electromagnetic shielding functionality.

Implementation Method 1

the metal layer can be formed by sputtering

Methodology Applied
Scientific EffectSputtering: Sputtering

Data Source

PatentUS8766416B2Semiconductor package and fabrication method thereof
Publication Date: 2014.07.01 SILICONWARE PRECISION IND CO LTD
  • US8766416B2 patent drawing
  • US8766416B2 patent drawing
  • US8766416B2 patent drawing

AI summary

A semiconductor package includes a substrate having opposite first and second surfaces and a ground layer therein. Further, the second surface has at least a recessed portion for exposing portions of the ground layer. The semiconductor package further includes a semiconductor chip disposed on the first surface of the substrate; an encapsulant formed on the first surface of the substrate for encapsulating the semiconductor chip; and a metal layer covering the encapsulant and the substrate and extending to the recessed portion for electrically connecting the ground layer. As such, the space for circuit layout is increased and the circuit layout flexibility is improved.