Semiconductor Package Layout With Edge Conductive Paths
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Solution Overview
Problem
The existing silicon photonic transceivers face high costs and lower throughput due to complex fabrication processes, suffer from electrical and optical losses due to long signal paths through silicon interposers, and have increased optical paths and non-flat package designs, making them less suitable for manufacturing.
Innovation Solution
A semiconductor package manufacturing method that involves providing a substrate with an insulating layer and interconnect structure, thinning the substrate, disposing optical chips and molding compound, and forming conductive layers to reduce signal path length and improve package flatness, replacing traditional through-silicon vias with conductive layers for vertical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-silicon via connections are used in silicon photonic transceivers, then electrical connections between chips are established, but signal path length increases causing electrical and optical losses
Solution Approach 1:
The patent transitions from vertical through-silicon via connections to lateral edge-based connections. By moving the connection interface to the edge of the substrate rather than penetrating through it, the signal path is shortened and routed along the edge, reducing both electrical and optical losses while maintaining connection reliability.
Solution Approach 2:
The connection structure is segmented into separate functional zones: optical coupling edges and electrical contact edges. This segmentation allows optimized signal paths for both optical and electrical connections, avoiding the need for long through-silicon via paths and reducing interference between optical and electrical signals.
2Adaptability or versatility
If complex fabrication processes are used for silicon photonic transceivers, then integrated optical and electrical functions are achieved, but manufacturing cost increases and productivity decreases
Solution Approach 1:
The fabrication process is segmented into separate stages: photonic device fabrication on the substrate, followed by lateral edge connection formation. This segmentation allows standard photonic fabrication processes to be used without requiring additional complex through-silicon via steps, improving manufacturability and productivity while maintaining integrated functionality.
Solution Approach 2:
Lateral edge structures serve as intermediaries between optical and electrical domains. These edge-based connections mediate the interaction between optical fibers and electrical contacts without requiring complex three-dimensional integration, simplifying the fabrication process and improving manufacturing efficiency.
3Loss of energy
If lateral edge connections are used instead of through-silicon vias, then signal path length is reduced, but connection structure complexity increases
Solution Approach 1:
The lateral edge structures serve multiple functions simultaneously: optical coupling, electrical contact, and mechanical alignment. This multi-functionality reduces the need for separate through-silicon via structures and additional alignment features, actually simplifying the overall connection structure while achieving shorter signal paths.
Solution Approach 2:
By moving connections to the lateral edge dimension rather than vertical through-dimension, the patent creates a simpler two-dimensional connection interface that naturally provides shorter signal paths and inherent alignment features, reducing structural complexity compared to three-dimensional through-silicon via arrangements.
Data Source
AI summary
A semiconductor package includes an interconnect structure, an insulating layer and a conductive layer. The interconnect structure includes a first surface and a second surface opposite to the first surface. The insulating layer contacts the interconnect structure. The insulating layer includes a third surface contacting the second surface of the interconnect structure and a fourth surface opposite to the third surface. The conductive layer is electrically coupled to the interconnect structure. The conductive layer has a continuous portion extending from the second surface to the fourth surface.


