Semiconductor Package Layout With Embedded IVR for Power Integrity
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving high integration density and power integrity in semiconductor devices due to limitations in packaging techniques, particularly in Package-on-Package (PoP) technology, which affects the performance and efficiency of integrated circuit packages.
Innovation Solution
The solution involves a system-on-integrated-substrate (SoIS) package configuration where an integrated voltage regulator (IVR) is placed between the redistribution structure and the core substrate, optimizing the distance between the IVR and the integrated circuit package to enhance power integrity and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If Package-on-Package (PoP) technology is used to achieve high integration density, then component density and functionality are enhanced, but power integrity deteriorates due to increased distance between voltage regulator and integrated circuit package
Solution Approach 1:
The patent transitions from a horizontal PoP stacking arrangement to a vertical integration approach where the voltage regulator is positioned directly beneath the integrated circuit package on the same substrate. This dimensional reorganization reduces the power delivery path length while maintaining high component density through layered vertical arrangement.
Solution Approach 2:
The patent introduces a substrate as an intermediary platform that hosts both the integrated circuit package and the voltage regulator in close proximity. This substrate-mediated arrangement enables direct power delivery from the voltage regulator to the package, eliminating the need for long external power paths while maintaining design flexibility.
2Reliability
If distance between voltage regulator and integrated circuit package is reduced to improve power integrity, then voltage and power drops decrease, but package design complexity increases
Solution Approach 1:
The patent merges the voltage regulator and integrated circuit package into a single integrated unit on the same substrate, with the regulator positioned directly beneath the package. This consolidation eliminates separate power delivery components and interconnects, reducing overall design complexity while improving power integrity through minimized current paths.
Solution Approach 2:
The substrate serves multiple functions simultaneously: it provides mechanical support for both the voltage regulator and integrated circuit package, establishes electrical connections between them, and enables close proximity positioning for optimal power delivery. This multi-functional approach simplifies the overall package design by eliminating the need for separate components for each function.
Data Source
AI summary
A semiconductor device includes a redistribution structure, an integrated circuit package attached to a first side of the redistribution structure and a core substrate coupled to a second side of the redistribution structure with a first conductive connector and a second conductive connector. The second side is opposite the first side. The semiconductor device further includes a top layer of the core substrate including a dielectric material and a chip disposed between the redistribution structure and the core substrate. The chip is interposed between sidewalls of the dielectric material.