Semiconductor Package Manufacturing Using Segmented EMC Frame
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Solution Overview
Problem
Existing methods for manufacturing semiconductor packages face challenges in achieving precise pattern alignment and EMC molding flatness, particularly in the production of fan-out wafer level packages, which hinders mass production and increases defects.
Innovation Solution
A method involving a rectangular frame with quadrangular holes made of epoxy molding compound (EMC) is used to support semiconductor chips, followed by a tape-based process for forming a resin layer and wiring, allowing for accurate alignment and efficient encapsulation, and subsequent singulation of individual chips through sawing, with the frame aiding in cutting and reducing handling issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional wafer cutting and packaging method is used, then individual semiconductor chips can be packaged, but pattern alignment precision and EMC molding flatness deteriorate
Solution Approach 1:
The patent applies preliminary action by performing the packaging process on the wafer before final cutting. The wafer is packaged in its entirety first, maintaining flatness during EMC molding, and then cut into individual chips. This sequence ensures that the molding process occurs on a flat, intact wafer surface, preventing the flatness issues that would arise if individual chips were packaged separately after cutting.
Solution Approach 2:
The patent uses segmentation by introducing a rectangular frame with quadrangular holes that divides the wafer into multiple packaging regions. This frame structure allows the wafer to be segmented into individual chip areas while maintaining overall wafer integrity during the molding process, enabling both precise alignment and flat molding by providing structural guidance without requiring premature cutting.
2Productivity
If wafer level packaging is implemented without cutting, then mass production efficiency improves, but pattern alignment precision deteriorates
Solution Approach 1:
The rectangular frame acts as an intermediary structure between the wafer and the packaging process. It provides alignment references and structural support during the molding process, enabling precise pattern alignment to be maintained even when packaging the entire wafer at once. The frame's quadrangular holes guide chip placement and wiring alignment, serving as a mediator that preserves precision during high-volume wafer-level packaging.
3Manufacturing precision
If individual chips are packaged separately, then alignment precision can be maintained, but manufacturing complexity and handling issues increase
Solution Approach 1:
The patent merges multiple operations by performing packaging on the entire wafer simultaneously rather than handling individual chips separately. The rectangular frame with quadrangular holes enables this merging by providing a unified structure that maintains alignment precision across all chips during the molding process, thereby reducing manufacturing complexity and handling requirements while preserving alignment accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances pattern alignment, improves EMC molding flatness, and enables efficient mass production of fan-out wafer level packages with reduced defects and lower manufacturing costs by utilizing a frame that supports chip alignment and facilitates accurate cutting.
Implementation Method 1
prior to the peeling of the tape, curing the molding part
Implementation Method 2
forming a resin layer at a portion at which the tape is peeled
Implementation Method 3
forming the wiring by plating and filling the via hole
Data Source
AI summary
Disclosed herein is a method for manufacturing a semiconductor package. According to a preferred embodiment of the present invention, a method for manufacturing a semiconductor package includes: preparing a rectangular frame having a plurality of quadrangular holes; attaching a plurality of semiconductor chips and the frame on one surface of a tape; forming a molding part on the tape to cover the semiconductor chip and the frame; peeling the tape; forming a resin layer at a portion at which the tape is peeled; and forming a wiring on the resin layer to be connected to the semiconductor chip.