Semiconductor Package Encapsulant Layout for Thin, Reliable Packaging

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Solution Overview

Problem

Existing semiconductor packages face challenges in achieving a balance between thinness, lightness, productivity, and reliability while incorporating semiconductor chips with various functions.

Innovation Solution

The semiconductor package incorporates a package substrate with a first and second semiconductor device mounted on it, along with a package encapsulant comprising a first and second encapsulant. The encapsulants are integrally provided, with the first encapsulant contacting the side surfaces of the first semiconductor device and the second encapsulant laterally spaced from the second semiconductor device, enhancing protection and structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single encapsulant is used to cover all semiconductor devices, then manufacturing process is simplified, but reliability and protection effectiveness are reduced

Engineering Contradiction:
Improveencapsulant manufacturing processVSAvoidpackage reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The encapsulant is divided into multiple separate encapsulants (first encapsulant and second encapsulant) that independently cover different semiconductor devices. This segmentation allows each encapsulant to be optimized for its specific device, improving reliability and protection effectiveness while still maintaining a relatively simple manufacturing process.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple separate encapsulants are used for different semiconductor devices, then reliability and protection are improved, but manufacturing complexity increases

Engineering Contradiction:
Improvepackage reliabilityVSAvoidencapsulant structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple separate encapsulants are used to cover different semiconductor devices, allowing each device to have optimized protection while maintaining manufacturing efficiency. The first encapsulant covers the first semiconductor device and the second encapsulant covers the second semiconductor device, improving reliability without excessive complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Object-affected harmful factors

If encapsulant covers all connection pads, then protection is improved, but accessibility and subsequent mounting operations become difficult

Engineering Contradiction:
Improveprotection against environmental factorsVSAvoidconnection pad accessibility
Core Design Contradiction:
Object-affected harmful factorsVSEase of operation

Solution Approach 1:

The encapsulant is strategically positioned to cover only specific areas (semiconductor devices) while leaving other areas (connection pads) exposed and accessible. This selective coverage protects vulnerable components while maintaining accessibility for electrical connections and subsequent mounting operations.

Inventive Principle:
Principle #2Taking out (Extraction)

4Length of stationary object

If package thickness is reduced to make it thinner and lighter, then portability is improved, but structural integrity and warpage resistance deteriorate

Engineering Contradiction:
Improvepackage thicknessVSAvoidstructural integrity
Core Design Contradiction:
Length of stationary objectVSStrength

Solution Approach 1:

The encapsulant provides localized structural support and protection where needed (around semiconductor devices) rather than uniformly throughout the entire package. This allows the package to be thinner overall while maintaining structural integrity and warpage resistance at critical locations through the encapsulant's protective coverage.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250062172A1Semiconductor package
Publication Date: 2025.02.20 SAMSUNG ELECTRONICS CO LTD
  • US20250062172A1 patent drawing
  • US20250062172A1 patent drawing
  • US20250062172A1 patent drawing

AI summary

A semiconductor package includes a package substrate, a first semiconductor device on the package substrate, a second semiconductor device on the package substrate and spaced laterally from the first semiconductor device, and a package encapsulant including a first encapsulant and a second encapsulant. The first encapsulant is on the package substrate, is in contact with side surfaces of the first semiconductor device, and encloses the side surfaces of the first semiconductor device. The second encapsulant is on the package substrate and laterally spaced apart from some side surfaces of the second semiconductor device, wherein the first encapsulant and the second encapsulant are integrally provided, and some side surfaces of the package encapsulant are coplanar with an outer edge of the package substrate.