Semiconductor Package Structure Enhancement Layer Warpage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The semiconductor package structure experiences warpage due to the mismatch in coefficient of thermal expansion (CTE) between the molding compound and the redistribution layer (RDL), leading to imbalance and deformation, which complicates de-carrier operations and increases the risk of wafer breakage.

Innovation Solution

A structure enhancement layer is introduced around the semiconductor die, positioned to align its mass center with the geometric center of the package, thereby balancing the mass distribution and reducing warpage, composed of materials like stainless steel or fiberglass to enhance mechanical strength and stiffness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a molding compound with CTE close to the RDL (60 ppm/C) is selected to balance mass, then convex warpage after de-carrier operation is reduced, but concave warpage before de-carrier operation is exacerbated, causing wafer breakage and handling issues

Engineering Contradiction:
Improvemass balanceVSAvoidwafer integrity
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

A structure enhancement layer is introduced as an intermediary component between the RDL and the molding compound. This layer has a CTE specifically designed to be between the CTE of the RDL (60 ppm/C) and the molding compound (8 ppm/C), acting as a thermal expansion mediator that gradually transitions the CTE mismatch. This intermediary layer prevents both concave and convex warpage by distributing the thermal stress, thereby maintaining wafer integrity during de-carrier operations while achieving mass balance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The structure enhancement layer is constructed from composite materials that provide tailored mechanical and thermal properties. By selecting composite materials with specific CTE values between those of the RDL and molding compound, the invention creates a multi-material system where each layer contributes to reducing overall warpage. The composite nature of this enhancement layer allows optimization of both structural support and thermal expansion compatibility.

Inventive Principle:
Principle #40Composite materials

2Stability of the object's composition

If a molding compound with CTE close to the glass carrier (8 ppm/C) is selected to balance structure mass, then concave warpage before de-carrier operation is reduced, but convex warpage after de-carrier operation increases, inhibiting subsequent packaging procedures

Engineering Contradiction:
Improvemass balanceVSAvoidpackaging procedure feasibility
Core Design Contradiction:
Stability of the object's compositionVSEase of operation

Solution Approach 1:

The structure enhancement layer serves as a mediator that bridges the CTE gap between the glass carrier and the molding compound. By positioning this layer with intermediate CTE properties between the carrier and compound, it ensures smooth thermal transition during temperature changes in packaging procedures, preventing convex warpage that would otherwise inhibit subsequent packaging operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If the CTE mismatch between molding compound and RDL is not addressed, then material selection is simplified, but warpage and deformation occur, complicating de-carrier operations

Engineering Contradiction:
Improvematerial selection complexityVSAvoidde-carrier operation
Core Design Contradiction:
Device complexityVSEase of operation

Solution Approach 1:

The invention segments the packaging structure into distinct functional layers, each with optimized CTE properties. By dividing the structure into the RDL, the structure enhancement layer, and the molding compound, the CTE mismatch problem is distributed across multiple interfaces rather than concentrated at one interface. This segmentation allows each layer to be independently optimized for its specific function while collectively reducing warpage.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The structure enhancement layer effectively inhibits both concave and convex warpage, enhancing the mechanical strength and stiffness of the semiconductor package, facilitating balanced mass distribution and stable de-carrier operations.

Implementation Method 1

Due to the coefficient of thermal expansion (CTE) of the molding compound and that of the RDL being different, or the structure mass is imbalanced, warpage or deformation of the semiconductor package could occur.

Methodology Applied
Scientific EffectCoefficient of thermal expansion (CTE) mismatch: Thermal Expansion

Implementation Method 2

composed of materials like stainless steel or fiberglass to enhance mechanical strength and stiffness

Methodology Applied
Scientific EffectMechanical strength enhancement:

Implementation Method 3

calculating the position of the structure enhancement layer such that a mass center of the final package structure including such structure enhancement layer coincides with the previously identified geometric center

Methodology Applied
Scientific EffectMass balance:

Data Source

PatentUS10943843B2Semiconductor package structure
Publication Date: 2021.03.09 ADVANCED SEMICON ENG INC
  • US10943843B2 patent drawing
  • US10943843B2 patent drawing
  • US10943843B2 patent drawing

AI summary

A semiconductor package structure includes a conductive trace layer, a semiconductor die over the conductive trace layer, a structure enhancement layer surrounding the semiconductor die, and an encapsulant covering the semiconductor die and the structure enhancement layer. The structure enhancement layer coincides with a mass center plane of the semiconductor package structure. The mass center plane is parallel to a top surface of the semiconductor die. A method for manufacturing the semiconductor package structure is also provided.