Semiconductor Package Molding With Exposed Die for Sensing

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Solution Overview

Problem

The complexity of manufacturing miniaturized semiconductor devices leads to issues such as poor structural configuration and delamination, resulting in high yield loss and increased manufacturing costs, particularly in wafer level packaging where the integration of multiple components complicates the process.

Innovation Solution

A semiconductor structure is designed with at least a portion of the die or package exposed from the molding to facilitate sensing functions, achieved by modifying the mold design to allow partial or complete exposure of the die surface, and a method involving the formation of interconnect structures and moldings to ensure electrical connectivity and structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If wafer level packaging is used to miniaturize semiconductor devices, then device size is reduced and integration is increased, but manufacturing complexity increases and structural integrity deteriorates

Engineering Contradiction:
Improvedevice sizeVSAvoidmanufacturing complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent divides the semiconductor device into separate functional layers including substrate, device layer, and encapsulant layer. This segmentation allows each layer to be optimized independently for its specific function while reducing overall manufacturing complexity despite miniaturization requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements nested structures where the device is embedded within the substrate, and the encapsulant surrounds and protects the device. This nesting approach enables compact integration of multiple components while maintaining structural integrity and simplifying the manufacturing process through sequential layer formation.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Adaptability or versatility

If multiple components are integrated in miniaturized scale, then functionality is increased, but delamination occurs and structural configuration deteriorates

Engineering Contradiction:
ImprovefunctionalityVSAvoidstructural configuration
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent employs composite material structures with the substrate providing mechanical support and the encapsulant providing environmental protection. This composite approach enables integration of multiple functional components while maintaining structural stability and preventing delamination through material compatibility and proper interface design.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent applies different material properties to different regions: the substrate provides rigid support where needed, while the encapsulant provides flexible protection in other areas. This local optimization of material properties allows high functionality integration while maintaining overall structural configuration stability.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If manufacturing operations are increased for greater functionality, then device capability is improved, but yield loss increases and manufacturing cost increases

Engineering Contradiction:
Improvedevice capabilityVSAvoidyield loss
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent performs preliminary actions by forming the substrate and device layer structure before integrating the encapsulant. This sequential approach allows defects to be identified and addressed at earlier stages, preventing yield loss in subsequent manufacturing steps while enabling greater device capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent combines multiple manufacturing operations into integrated process steps, such as forming interconnect structures and encapsulation in a unified sequence. This merging reduces the total number of discrete operations, thereby reducing yield loss and manufacturing cost while maintaining enhanced device capability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11854992B2Semiconductor structure and manufacturing method thereof
Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11854992B2 patent drawing
  • US11854992B2 patent drawing
  • US11854992B2 patent drawing

AI summary

A method of manufacturing a semiconductor structure includes following operations. A first die is provided. A first molding is formed to encapsulate the first die. A second die is disposed over the first molding. A mold chase is disposed over the second die and the first molding. The mold chase includes a protrusion protruded from the mold chase towards the first molding. A molding material is disposed between the mold chase and the first molding. A second molding is formed to surround the second die. The second die is at least partially covered by the second molding. The disposing of the mold chase includes surrounding the protrusion of the mold chase by the molding material.