Semiconductor Package Redistribution Layer for Residue-Free Exposure
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Solution Overview
Problem
Existing wafer level package (WL-PKG) technologies face challenges in forming precise and efficient redistribution layers using photosensitive polymers that react to light, leading to issues with residue formation and incomplete exposure during the manufacturing process.
Innovation Solution
A semiconductor package design incorporating a lower redistribution wiring layer with a first and second photosensitive insulating layer, a light blocking layer, and a method of manufacturing involving sequential formation of through holes and redistribution wires using positive and negative photosensitive materials to ensure precise exposure and connection of redistribution wires.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single photosensitive insulating layer is used to form redistribution layers, then the manufacturing process is simpler, but residue formation occurs and exposure is incomplete
Solution Approach 1:
The patent divides the insulating structure into multiple photosensitive insulating layers (first photosensitive insulating layer and second photosensitive insulating layer) with a light blocking layer in between. This segmentation allows each layer to be exposed and developed separately, preventing residue formation and ensuring complete exposure by addressing the limitations of using a single photosensitive layer.
2Ease of manufacture
If photosensitive polymers are used to form redistribution layers, then the manufacturing process is simplified, but residue formation and incomplete exposure occur
Solution Approach 1:
The patent segments the photosensitive insulating structure into multiple layers (first photosensitive insulating layer, light blocking layer, and second photosensitive insulating layer). This segmentation enables separate exposure and development processes for each layer, eliminating residue formation and ensuring complete exposure, thereby improving the reliability of the redistribution layer while maintaining process simplicity.
3Reliability
If through holes are formed to expose underlying layers for wire connection, then electrical connection is achieved, but residue formation occurs during the exposure process
Solution Approach 1:
The patent divides the insulating structure into multiple photosensitive layers with a light blocking layer, allowing through holes to be formed in each layer separately during distinct exposure and development steps. This segmentation prevents residue formation that would occur if all layers were exposed and developed simultaneously, while still achieving complete electrical connection through the stacked via structure.
4Manufacturing precision
If a light blocking layer is added between photosensitive insulating layers, then precise exposure control is achieved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent introduces a light blocking layer as an intermediary between the first and second photosensitive insulating layers. This light blocking layer acts as a mediator that prevents light from reaching the second photosensitive layer during the first exposure, enabling precise control of the exposure process. Although it adds structural complexity, it significantly improves exposure precision and eliminates residue formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables precise and residue-free formation of redistribution layers, enhancing the efficiency and reliability of semiconductor package manufacturing by ensuring complete exposure and connection of redistribution wires without residue formation.
Implementation Method 1
the insulating layer including a positive photosensitive insulating layer
Implementation Method 2
the insulating layer including a positive photosensitive insulating layer, a light blocking layer on the positive photosensitive insulating layer, and a negative photosensitive insulating layer on the light blocking layer
Data Source
AI summary
A semiconductor package includes a lower redistribution wiring layer; and a first semiconductor device on the lower redistribution wiring layer, the first semiconductor device being connected to the lower redistribution wiring layer via conductive bumps, wherein the lower redistribution wiring layer includes: a first redistribution wire in a first lower insulating layer; an insulating structure layer having an opening that exposes a portion of the first redistribution wire, the insulating structure layer including a first photosensitive insulating layer, a light blocking layer on the first photosensitive insulating layer, and a second photosensitive insulating layer on the light blocking layer; a second redistribution wire in the opening of the insulating structure layer, the second redistribution wire including a redistribution via contacting the first redistribution wire, and a redistribution line stacked on the redistribution via; and bonding pads bonded to the conductive bumps and electrically connected to the second redistribution wire.


