Semiconductor Package Fillet Structure for Warpage-Stable Chip Stacks

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Solution Overview

Problem

The miniaturization of semiconductor packages is limited by the use of non-conductive films (NCF) between semiconductor chips, leading to warpage issues.

Innovation Solution

A semiconductor package design featuring stacked semiconductor chips with fillets and a molding film that includes a separating part between the stacks, ensuring flat inner surfaces and reducing warpage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If non-conductive films (NCF) are used between semiconductor chips, then electrical insulation is improved, but package miniaturization is limited and warpage occurs

Engineering Contradiction:

Improveelectrical insulationVSAvoidpackage size

Core Design Contradiction:

ReliabilityVSVolume of moving object

Solution Approach 1:

The patent removes the non-conductive film (NCF) layer from between the semiconductor chips, extracting the harmful element that caused both size increase and warpage issues while maintaining electrical insulation through alternative means

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different properties to different regions: the fillet structure provides localized support and stress distribution at critical interfaces, while the molding compound provides overall encapsulation, creating local quality variations that prevent warpage without requiring uniform NCF throughout

Inventive Principle:

Principle #3Local quality

2Reliability

If non-conductive films (NCF) are used between semiconductor chips, then electrical insulation is improved, but warpage is generated

Engineering Contradiction:

Improveelectrical insulationVSAvoidpackage flatness

Core Design Contradiction:

ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent extracts the NCF layer that caused warpage, removing the source of the stability problem while electrical insulation is maintained through the fillet and molding compound structure

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The fillet structure is formed beforehand to provide stress compensation and cushioning at the chip interfaces, preventing warpage from developing in the first place rather than correcting it afterward

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Volume of moving object

If chip stacks are miniaturized, then package size is reduced, but warpage due to miniaturization occurs

Engineering Contradiction:

Improvepackage sizeVSAvoidpackage flatness

Core Design Contradiction:

Volume of moving objectVSStability of the object's composition

Solution Approach 1:

The patent addresses the warpage problem by introducing a vertical dimension solution - the fillet structure extends vertically along the chip stacks to provide stress distribution, converting a potential planar warpage issue into a three-dimensional stress management problem that is solved through vertical structural elements

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250349637A1Semiconductor package including fillet structure

Publication Date: 2025.11.13 SAMSUNG ELECTRONICS CO LTD

AI summary

Provided is a semiconductor package including a first stack including first semiconductor chips that are stacked, a first fillet between the first semiconductor chips, a second stack spaced apart from the first stack and including second semiconductor chips that are stacked, and a second fillet between the second semiconductor chips, wherein each of the first semiconductor chips includes a first side surface facing the second stack, each of the second semiconductor chips includes a third side surface facing the first stack, the first fillet includes a first inner surface on the first side surfaces, the second fillet includes a second inner surface on the third side surfaces, and the first inner surface and the second inner surface are formed flat along a direction that the first semiconductor chips are stacked.