Semiconductor Package Film Substrate Through Hole Alignment
Solution Overview
Problem
The alignment between leads on a tape circuit substrate and bumps on a semiconductor chip is challenging due to thermal expansion during packaging, leading to defective electrical connections and degraded semiconductor package performance.
Innovation Solution
A semiconductor package design featuring a film substrate with through holes and recesses, where the semiconductor chip is inserted into the substrate, and circuit wires are formed after chip mounting, ensuring improved alignment and reducing thermal expansion issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If thermal packaging process is used to bond leads to bumps, then bonding strength is improved, but alignment precision deteriorates due to thermal expansion
Solution Approach 1:
The patent applies preliminary action by pre-forming recesses on the semiconductor chip surface before the bonding process. These recesses are created in advance to compensate for the thermal expansion that will occur during subsequent high-temperature packaging. The recesses allow the chip to sink into the substrate, maintaining alignment between leads and bumps despite thermal effects.
Solution Approach 2:
The patent changes the physical parameters of the chip-substrate interface by creating recesses with specific dimensions and depths. This structural modification alters how the chip interacts with the substrate during thermal processing, allowing the chip to settle into the recesses and maintain proper alignment even as materials expand thermally.
2Volume of moving object
If leads and bumps are made with small line widths for miniaturization, then device size is reduced, but alignment difficulty increases
Solution Approach 1:
The recesses are pre-formed on the chip surface to establish a mechanical guide structure before bonding. This preliminary structural feature provides physical constraints that facilitate alignment of the small-line-width leads with corresponding bumps, reducing alignment difficulty despite miniaturization.
Solution Approach 2:
The recesses act as an intermediary mechanical feature between the chip and substrate. This intermediate structure provides a physical reference and constraint system that helps align the fine-pitch leads and bumps, mediating the alignment challenge posed by small line widths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the alignment between bumps and circuit wires, reduces defective contacts, and allows for a lower package height by maintaining the surfaces of the chip and substrate at the same level, thereby improving the electrical characteristics and reliability of the semiconductor package.
Implementation Method 1
the packaging may be carried out at a temperature of 300° C. to 400° C., for example. This thermal process may cause the tape film to expand, resulting in defective alignment.
Data Source
AI summary
A package may include a semiconductor chip mounted on a film substrate. A method of manufacturing the same may involve providing a semiconductor chip. The semiconductor chip may include recesses and bumps. A film substrate including a through hole may be provided. The semiconductor chip may be inserted into the through hole of the film substrate. Circuit wires may be formed on the film substrate to contact the bumps of the semiconductor chip.