Semiconductor Package With Floor And Ceiling Dies
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Solution Overview
Problem
Prior semiconductor package designs face limitations due to components being solely located on one side of the package, leading to inefficient use of internal space, inadequate heat dissipation, and reduced component density, which affects operating parameters and device lifetime.
Innovation Solution
A semiconductor package design featuring components on both the floor and ceiling with electrical conductors connecting them, an air space between the floor and ceiling, and optional heat sinks and high-frequency connectors to enhance thermal management and component density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all components are located on the floor of the package, then the package structure is simple, but the component density is low and heat dissipation is inadequate
Solution Approach 1:
The patent transitions from a two-dimensional floor-only layout to a three-dimensional configuration by placing components on both the floor and ceiling of the package. This dimensional expansion effectively doubles the available mounting area, significantly increasing component density without complicating the package structure
2Device complexity
If all components are located on the floor of the package, then the package structure is simple, but heat dissipation is inadequate
Solution Approach 1:
By distributing heat-generating components across both floor and ceiling surfaces, the patent creates multiple thermal pathways for heat dissipation. The ceiling components can be positioned near ceiling-mounted heat sinks, establishing vertical thermal conduction paths that complement the floor-based thermal management
Solution Approach 2:
The patent applies different thermal management strategies to different locations: floor components utilize floor-based heat sinks and thermal vias, while ceiling components utilize ceiling-based heat sinks. This localized approach optimizes heat dissipation for each component based on its specific thermal requirements and location
3Volume of moving object
If electronic devices are made smaller, then the device size is reduced, but the available space on PCB and package is limited
Solution Approach 1:
The patent resolves the space limitation in miniaturized devices by exploiting the vertical dimension within the package. By utilizing both floor and ceiling surfaces for component placement, the effective component carrying area is doubled without increasing the package footprint, enabling higher component density in smaller devices
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design increases component density, improves heat dissipation by strategically placing heat-generating components near heat sinks, and optimizes the use of internal space, thereby enhancing the package's electrical processing capability and device reliability.
Implementation Method 1
an air space located between the package floor and the package ceiling
Implementation Method 2
heat dissipation from the electrical components
Implementation Method 3
an upper heat sink located on the package ceiling... heat conductors in the package ceiling that connect to the heat sink
Data Source
AI summary
A semiconductor package and die assembly with a package having an exterior surface and an interior space, the interior space defined by a first side wall, and a second side wall that opposes the first side wall. Also part of the assembly is a package floor and a package ceiling. The package floor includes package floor conductors. The package ceiling opposes the package floor and includes package ceiling conductors in the package ceiling. One or more semiconductor dies are on the floor of the package floor. Electrical conductors electrically connect the one or more floor dies to the package floor conductors. One or more semiconductor dies are located on the package ceiling. Electrical conductors are configured to electrically connect the one or more ceiling dies to the package ceiling conductors. An air space is located between the package floor and the package ceiling.


