Semiconductor Package Flow-Guiding Grooves for Underfill Corner Coverage

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Solution Overview

Problem

Conventional semiconductor packages face issues with the protective layer and underfill failing to cover the corners of the chip-mounting area, leading to structural weakness and potential damage to inner leads during peeling tests.

Innovation Solution

Incorporation of flow-guiding grooves and a hollow portion on the circuit board to direct the protective layer and filling material to cover these uncovered areas, forming overlapping bonding layers that enhance structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the protective layer and underfill are applied using conventional methods, then the manufacturing process is simple, but the protective layer and underfill fail to cover the corner areas of the chip-mounting area, resulting in exposed substrate areas that compromise structural strength

Engineering Contradiction:
Improvestructural strengthVSAvoidstructure complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The flow-guiding grooves are formed in advance on the circuit board before the protective layer and underfill are applied. These pre-formed grooves act as flow channels that guide the materials to cover the corner areas that would otherwise remain exposed, ensuring complete coverage without requiring complex application processes

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The flow-guiding grooves are divided into multiple segments including first grooves extending from the first side, second grooves extending from the second side, and third grooves connecting them. This segmented structure effectively guides the protective layer and underfill along specific paths to ensure complete coverage of the corner area while maintaining manufacturing simplicity

Inventive Principle:
Principle #1Segmentation

2Reliability

If flow-guiding grooves are added to the circuit board, then the coverage of protective layer and filling material is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improvecoverage completenessVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The flow-guiding grooves serve multiple functions: they guide the protective layer during application, direct the underfill flow, and structurally reinforce the corner area. This multi-functionality achieves complete coverage and enhanced reliability without proportionally increasing manufacturing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The flow-guiding grooves are strategically located only in the corner area where coverage is needed, rather than across the entire circuit board. This localized approach improves coverage completeness in the critical corner region while minimizing the overall structural complexity and manufacturing complexity

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12464639B2Semiconductor package having flow-guiding grooves and circuit board thereof
Publication Date: 2025.11.04 CHIPBOND TECH
  • US12464639B2 patent drawing
  • US12464639B2 patent drawing
  • US12464639B2 patent drawing

AI summary

A semiconductor package includes a chip, a circuit board and a filling material. The circuit board includes a substrate, a patterned metal layer and a protective layer. A circuit area, a chip-mounting area and a flow-guiding area are defined on a surface of the substrate. The chip is mounted on the chip-mounting area. A flow-guiding member of the patterned metal layer is arranged on the flow-guiding area and includes a hollow portion and flow-guiding grooves which are communicated with the hollow portion and arranged radially. The flow-guiding grooves are provided to allow the protective layer to flow toward the hollow portion, and the hollow portion and the flow-guiding grooves are provided to allow the filling material to flow toward the protective layer such that the filling material can cover the protective layer to improve structural strength of the semiconductor package.