Semiconductor Package Surface Roughness for Flux Flow Control
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Solution Overview
Problem
The challenge in semiconductor packaging lies in the delamination and contamination issues caused by the flux layer due to uneven surface roughness, which affects the bonding and integrity of the semiconductor package components.
Innovation Solution
The semiconductor package design includes specific regions with controlled surface roughness to manage the flux layer distribution, ensuring a wider flow in the passive element adjacent regions and minimizing contamination in the remaining regions, thereby reducing delamination risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the surface roughness is increased in the passive element adjacent region, then the flux layer flows more widely in that region, but the flux layer may contaminate the remaining region and cause delamination
Solution Approach 1:
The package substrate is designed with different surface roughness characteristics in different regions: the passive element adjacent region has higher surface roughness to promote flux layer flow and prevent delamination, while the remaining region has lower surface roughness to minimize contamination. This localized differentiation of surface properties allows the flux layer to be guided and contained in specific areas, resolving the contradiction between achieving wide flux flow and preventing contamination.
2Object-affected harmful factors
If the surface roughness is decreased in the remaining region, then contamination is minimized, but the flux layer flow may be insufficient in the passive element adjacent region
Solution Approach 1:
The package substrate implements spatially varying surface roughness: the remaining region maintains low roughness to prevent flux layer contamination and ensure bonding integrity, while the passive element adjacent region features high roughness to enable sufficient flux layer flow for proper bonding. This local quality differentiation allows each region to optimize its surface properties for its specific function.
Data Source
AI summary
A semiconductor package includes a substrate having a passive element region, a peripheral region adjacent to the passive element region, and a remaining region, a first passive element on an upper surface of the passive element region, a first semiconductor chip on an upper surface of the remaining region, and a sealing portion covering the substrate, the first passive element, and the first semiconductor chip, wherein the peripheral region includes a first sub-region on a first side of the first passive element, a second sub-region on a second side opposite the first side, a third sub-region on a third side of the first passive element, and a fourth sub-region on a fourth side opposite the third side, and wherein a roughness of an upper surface of at least one of the first to fourth sub-regions is greater than a roughness of the upper surface of the remaining region.