Semiconductor Package Integrating Four FETs on Lead Frame
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Solution Overview
Problem
Conventional Buck-Boost power controllers require two separate semiconductor packages, leading to increased size and impedance due to longer electrical paths and more pin outs, which complicates connections and reduces efficiency.
Innovation Solution
A semiconductor package integrating four field-effect transistors (FETs) in a single package with a lead frame, metal clips, and optional IC controller or inductor, reducing size and impedance by eliminating the need for separate packages and simplifying connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two separate semiconductor packages are used for Buck-Boost power controller, then each package can be individually optimized, but the overall size increases to 5 mm by 6 mm and impedance increases due to longer electrical paths
Solution Approach 1:
The patent combines four FETs (two high-side and two low-side) into a single semiconductor package with integrated die paddles, eliminating the need for two separate packages. This merging reduces the overall footprint from 5 mm by 6 mm to 5 mm by 5 mm while maintaining all necessary functions through internal electrical connections that shorten the electrical paths and reduce impedance.
2Ease of manufacture
If two separate semiconductor packages are used, then manufacturing simplicity is maintained, but the number of pin outs increases and connections become more complex
Solution Approach 1:
By integrating all four FETs and their interconnections within a single package, the patent reduces the number of external pin outs required. The internal die paddles and electrical paths are contained within the package, eliminating the need for complex inter-package connections and reducing assembly complexity while maintaining manufacturing feasibility through standardized packaging processes.
3Ease of manufacture
If two separate packages are used, then modular assembly is simplified, but electrical path length increases leading to higher impedance
Solution Approach 1:
The patent integrates the high-side and low-side FETs within the same package with short internal electrical paths between die paddles. This eliminates the long external traces and inter-package connections required in modular designs, significantly reducing impedance while maintaining assembly simplicity through a single-package installation approach.
Data Source
AI summary
A semiconductor package comprises a lead frame, a first field-effect transistor (FET), a second low side FET, a first high side FET, a second high side FET, a first metal clip, a second metal clip, and a molding encapsulation. The semiconductor package further comprises an optional integrated circuit (IC) controller or an optional inductor. A method for fabricating a semiconductor package. The method comprises the steps of providing a lead frame; attaching a first low side FET, a second low side FET, a first high side FET, and a second high side FET to the lead frame; mounting a first metal clip and a second metal clip; forming a molding encapsulation; and applying a singulation process.