Semiconductor Package With Frame-Embedded Chip and Surface-Mounted Passive Components

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Solution Overview

Problem

The increasing size of mobile device displays necessitates larger batteries, which in turn requires a reduction in printed circuit board size, leading to a decrease in component mounting area and increased electromagnetic interference between semiconductor chips and passive components, making it challenging to efficiently mount and connect these components.

Innovation Solution

A semiconductor package with a novel structure that reduces the mounting area and electrical noise by using a frame with a through-hole for the semiconductor chip, surface-mounted passive components, and a layered encapsulation system with insulating and redistribution layers, along with an electromagnetic wave shielding layer to minimize interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If components are mounted on a printed circuit board using COB technology, then cost is reduced, but mounting area increases and electromagnetic interference between components increases

Engineering Contradiction:
Improvemanufacturing costVSAvoidmounting area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent combines multiple components (semiconductor chip, passive components, and PCB) into a single integrated package structure. The passive components are mounted directly on the package substrate alongside the semiconductor chip, eliminating the need for separate PCB mounting and reducing overall mounting area while maintaining cost-effectiveness through integrated manufacturing

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from traditional 2D PCB mounting to a 3D integrated package structure where components are arranged in multiple layers and dimensions within the package. This vertical integration allows components to be stacked or positioned in three-dimensional space, significantly reducing the footprint area required for mounting

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If components are mounted on a printed circuit board using COB technology, then cost is reduced, but electromagnetic interference between components increases

Engineering Contradiction:
Improvemanufacturing costVSAvoidelectromagnetic interference
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the passive components from the traditional PCB mounting environment and relocates them into a dedicated package structure with controlled electromagnetic environment. This separation allows for optimized signal routing and shielding within the package, reducing electromagnetic interference while maintaining manufacturing efficiency

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The package substrate acts as an intermediary structure between the semiconductor chip and the external PCB connection. It provides controlled impedance traces, grounding schemes, and signal routing that mediate electromagnetic interactions, reducing interference while enabling cost-effective manufacturing through standardized package processes

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-generated harmful factors

If the distance between semiconductor chip and passive components is increased, then electromagnetic interference is reduced, but electrical noise increases due to longer electrical paths

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoidelectrical noise
Core Design Contradiction:
Object-generated harmful factorsVSObject-affected harmful factors

Solution Approach 1:

The patent uses vertical stacking and multi-layer substrate routing to reduce horizontal distances between components. By transitioning to 3D spatial arrangement with components positioned in different layers and levels, the electrical path lengths are minimized while maintaining sufficient physical separation to reduce electromagnetic interference

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11075193B2Semiconductor package
Publication Date: 2021.07.27 SAMSUNG ELECTRONICS CO LTD
  • US11075193B2 patent drawing
  • US11075193B2 patent drawing
  • US11075193B2 patent drawing

AI summary

A semiconductor package includes a connection structure including an insulating layer, a redistribution layer disposed on the insulating layer, and a connection via penetrating through the insulating layer and connected to the redistribution layer, a frame disposed on the connection structure and having a through-hole, a semiconductor chip disposed in the through-hole on the connection structure and having a connection pad disposed to face the connection structure, and a passive component disposed on the frame.