Semiconductor Package Frame for Reduced Mounting Area and Noise
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Solution Overview
Problem
The existing semiconductor packaging technologies, such as fan-in and fan-out packages, face challenges in reducing the mounting area and electrical pathways between semiconductor chips and passive components, leading to increased noise and difficulty in direct mounting on main boards due to large spatial limitations and electromagnetic interference.
Innovation Solution
A semiconductor package with a connection structure featuring an insulating layer, wiring layers, and connection vias, along with a frame having through-holes for the chip and passive components, and encapsulants that form a discontinuous interface, allowing for reduced mounting area and precise placement of the semiconductor chip, while minimizing electrical pathways and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If surface mounting technology (SMT) is used to mount components on a printed circuit board, then low cost is achieved, but a wide mounting area is required and electromagnetic interference between components is large
Solution Approach 1:
The patent merges the semiconductor chip and passive components into a single integrated package structure. The frame supports both the semiconductor chip and passive components in close proximity, eliminating the need for separate mounting areas on the printed circuit board. This consolidation directly reduces the overall mounting area while maintaining manufacturing efficiency.
2Ease of manufacture
If surface mounting technology (SMT) is used to mount components on a printed circuit board, then low cost is achieved, but electromagnetic interference between components is large
Solution Approach 1:
The frame serves as an intermediary structure that positions the semiconductor chip and passive components in optimized spatial relationships. By controlling the distances and orientations between components through the frame design, electromagnetic interference is minimized while maintaining a compact, cost-effective package structure.
3Ease of manufacture
If a large distance is maintained between the semiconductor chip and passive components, then ease of manufacturing is improved, but electrical noise increases
Solution Approach 1:
The frame enables different spatial configurations for different components based on their specific requirements. The semiconductor chip and passive components can be positioned at optimal distances from each other and from the printed circuit board, allowing close proximity for low-noise performance while maintaining manufacturability through the structured frame design.
4Area of stationary object
If the mounting area is reduced, then space efficiency is improved, but the precision of chip placement becomes more difficult to maintain
Solution Approach 1:
The frame is designed with pre-defined mounting positions and alignment features that guide the placement of the semiconductor chip and passive components. This preliminary structuring of the mounting substrate enables precise chip placement even in the reduced mounting area, as the frame provides built-in positioning references that simplify the placement process.
Data Source
AI summary
A semiconductor package includes a connection structure including an insulating layer, a wiring layer disposed on the insulating layer, and a connection via penetrating through the insulating layer and connected to the wiring layer. A frame is disposed on the connection structure and has one or more through-holes. A semiconductor chip and passive components are disposed in the one or more through-holes of the frame on the connection structure. A first encapsulant covers at least portions of the passive components and the frame. A frame wiring layer is disposed on the frame, and a location identifying mark is disposed around the semiconductor chip on the frame and is spaced apart from the frame wiring layer. At least a portion of the location identifying mark is not covered by the first encapsulant.