Semiconductor Package with Grinded Resin Surface for Thin Double-Sided Electrodes
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Solution Overview
Problem
Conventional double-sided electrode packages lack flexibility in interconnecting upper and lower packages and struggle with forming thinly layered sealing resin due to limitations in molding technology, restricting arbitrary electrode layouts and increasing package thickness.
Innovation Solution
A semiconductor device with a package substrate featuring recessed portions for semiconductor chips, grinded sealing resin surfaces for exposed terminal-use wires, and rewiring pads on the grinded surface to facilitate flexible rewiring and thin package construction, allowing for arbitrary electrode layouts and reduced thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If molding is performed using a mold to form the sealing resin layer, then the sealing resin layer can be formed, but it is difficult to thinly form the sealing resin layer
Solution Approach 1:
The patent applies preliminary action by forming the sealing resin layer thicker than needed during the molding process, then subsequently grinding it down to the desired thin thickness. This resolves the contradiction by allowing the molding process to create a sufficiently thick layer for ease of manufacture, while a later grinding step achieves the thin final thickness that would be difficult to mold directly.
2Adaptability or versatility
If the package substrate structure is fixed with predetermined electrode arrangements, then manufacturing is simplified, but flexibility in interconnecting upper and lower packages is reduced
Solution Approach 1:
The patent applies segmentation by dividing the electrode function into multiple independent components: electrode pads on the package substrate, terminal-use wires for external connections, and rewiring pads on the sealing resin surface. This segmentation allows each component to be optimized independently and enables flexible reconfiguration for different interconnection needs without redesigning the entire substrate structure.
Solution Approach 2:
The patent extends the electrode arrangement from a two-dimensional planar layout on the substrate to a three-dimensional structure by placing rewiring pads on the top surface of the sealing resin layer. This adds a vertical dimension to electrode placement, enabling more flexible interconnection patterns and arbitrary electrode layouts that cannot be achieved with conventional planar arrangements.
3Volume of moving object
If the package thickness is reduced to achieve high packaging density, then packaging density increases, but the sealing resin layer becomes too thin to form properly
Solution Approach 1:
The patent uses preliminary action by initially forming a thick sealing resin layer during molding that is sufficient for easy manufacturing, then removing excess material through grinding to achieve the final thin thickness. This allows the package to be thin for high density while avoiding the manufacturing difficulties of directly forming ultra-thin sealing layers.
Solution Approach 2:
The patent applies extraction by removing the excess sealing resin material after molding through a grinding process. This extraction step allows the sealing resin to be formed at an optimal thickness for manufacturing, then reduced to the thin final thickness needed for high packaging density without compromising manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables flexible interconnection of packages, easy formation of rewiring patterns, and significant thinning of double-sided electrode packages, preventing wire breakage and resin stripping during reflow, while maintaining high heat dissipation capabilities.
Implementation Method 1
a grinded surface that is parallel to the surface of the package substrate and is formed by grinding
Data Source
AI summary
A semiconductor device includes: a package substrate that includes a recessed portion, with electrode pads that are electrically connected to electrodes of the semiconductor chip being formed inside the recessed portion; a semiconductor chip that is housed in the recessed portion; terminal-use wires that are formed on the surface of the package substrate and are electrically connected to the electrode pads; external connection pads that are formed on a back surface of the package substrate and are electrically connected to the electrode pads; a sealing resin portion that includes a grinded surface that is parallel to the surface of the package substrate, and seals at least the semiconductor chip by a sealing resin; rewiring pads that are formed on the grinded surface; and connecting wires that are formed on the grinded surface and electrically interconnect the terminal-use wires and the rewiring pads.