Semiconductor Package Groove Structure to Constrain Solder Spread
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Solution Overview
Problem
Conventional semiconductor package manufacturing methods require additional costly processes and design limitations due to the spread of melted solder, which causes unintended movement of semiconductor chips, affecting the quality of subsequent processes.
Innovation Solution
The formation of intagliated grooves around semiconductor chips on a pad substrate using laser processing, filled with solder, to restrict chip movement and stabilize the electrical and mechanical bond between the solder and the substrate, with an intermetallic compound layer formed on the groove's inner wall.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If epoxy adhesive or PI film is used to form a wall around semiconductor chip, then spread of melted solder is blocked, but device complexity and manufacturing cost increase
Solution Approach 1:
The harmful function of the solder spread prevention structure is extracted and isolated into a dedicated groove component. The groove is specifically designed to contain solder while keeping the rest of the substrate surface flat and simple, separating the containment function from the overall substrate structure.
Solution Approach 2:
The groove acts as an intermediary structure between the solder and the substrate surface. Instead of using complex adhesive walls or films, the groove provides a simple geometric intermediary that contains solder through its physical boundaries without requiring additional materials or complex assembly steps.
2Reliability
If dams are formed to surround semiconductor chip installation area, then chip separation is prevented, but manufacturing cost and process complexity increase
Solution Approach 1:
The groove structure merges multiple functions into a single feature: it contains solder, prevents chip separation, and provides mechanical support. This consolidation eliminates the need for separate dams or adhesive structures, simplifying the manufacturing process and reducing costs.
Solution Approach 2:
The groove dimensions (depth, width, shape) are optimized to provide effective chip retention and solder containment. By adjusting these parameters, the same groove structure achieves reliable chip positioning without requiring additional manufacturing steps or materials.
3Object-affected harmful factors
If intagliated grooves are formed by laser processing, then solder spread is minimized and chip movement is restricted, but manufacturing precision requirements increase
Solution Approach 1:
Traditional mechanical methods of forming grooves (such as punching or molding) are replaced with laser processing. The laser provides precise control over groove geometry through optical energy, achieving accurate dimensions and smooth walls without mechanical contact, thereby maintaining precision while offering manufacturing flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes solder spread, maintains chip position, and enhances the quality of subsequent processes by stabilizing the electrical and mechanical connection between the solder and the pad substrate, while reducing costs and design constraints.
Implementation Method 1
an intagliated groove formed on the pad substrate having a length longer than at least the side of the semiconductor chip
Implementation Method 2
filled with at least a certain amount of melted solder
Implementation Method 3
an intermetallic compound layer is formed on a certain area included in an inner wall of the intagliated groove
Data Source
AI summary
Provided is a semiconductor package including: a pad substrate on which a semiconductor chip is installed; a solder formed on the pad substrate having a length same as or longer than a side of the semiconductor chip; and an intagliated groove formed on the pad substrate having a length longer than at least the side of the semiconductor chip and filled with at least a certain amount of melted solder, wherein the solder having a thickness of at least 1 μm or above is filled in the intagliated groove to have a length of at least 3 μm or above and an intermetallic compound layer is formed on a certain area included in an inner wall of the intagliated groove. Accordingly, movement of the semiconductor chip may be restricted so that the quality of following processes may be improved, and electrical and mechanical combination between the solder and the pad substrate may be stabled.