Semiconductor Package Assembly With Homogeneous Solder Mask Layer
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Solution Overview
Problem
Semiconductor package assemblies face thermal electrical issues such as heat dissipation, cross talk, and signal propagation delay due to increased input/output connections, affecting reliability and quality, particularly due to mismatched thermal expansion coefficients between the core substrate and solder mask layers.
Innovation Solution
A semiconductor package assembly with a base that includes a core substrate and a single solder mask layer formed of the same material as the core substrate, reducing thermal cycling stress and improving reliability by eliminating the need for additional solder mask layers on the solder-bump-attach surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If multiple solder mask layers are used on both surfaces of the core substrate, then the structural integrity and protection are improved, but the thermal expansion mismatch stress increases, reducing thermal cycling reliability
Solution Approach 1:
The patent applies homogeneity by forming the solder mask layer from the same material as the core substrate. This ensures that the solder mask layer and core substrate have identical thermal expansion coefficients, eliminating thermal expansion mismatch stress during thermal cycling while maintaining structural integrity and protection functions.
2Adaptability or versatility
If different materials are used for the core substrate and solder mask layer, then the functional properties are optimized, but the thermal expansion coefficient mismatch increases, causing interface stress and cracks
Solution Approach 1:
The patent uses the same material for both the core substrate and solder mask layer, ensuring homogeneous thermal expansion properties. This eliminates the harmful interface stress and cracks that would otherwise result from thermal expansion coefficient mismatch, while the layered structure maintains the necessary functional differentiation.
3Object-affected harmful factors
If additional solder mask layers are added on the solder-bump-attach surface, then the protection and insulation are improved, but the device complexity and manufacturing steps increase
Solution Approach 1:
The patent makes the single solder mask layer multi-functional by forming it from the same material as the core substrate. This single layer simultaneously provides protection, insulation, and thermal expansion compatibility, eliminating the need for additional solder mask layers on the solder-bump-attach surface and reducing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the thermal cycling reliability of the semiconductor package assembly by minimizing stress and preventing cracks at the interface between solder-bump structures and solder mask layers, thereby improving the overall performance and durability of the package.
Implementation Method 1
the core substrate and the solder mask layer on the device-attach surface of the core substrate are formed of the same material. This reduces the mismatch of CTE between the core substrate and the solder mask layer
Data Source
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AI summary
The invention provides a semiconductor package assembly. The semiconductor package assembly (500c) comprises a core substrate (200b) having a first surface (201) and a second surface (203) opposite to the first surface (201); a first pad (204) disposed on the first surface (201) of the core substrate (200b); a solder mask layer (216a) covering the first surface (201) of the core substrate (200b); and a conductive plug structure (235) having a top portion (232) on the first surface (201) of the core substrate (200b) and a bottom portion (234) between the first surface (201) and the second surface (203) of the core substrate (200b).