Semiconductor Package Dual-Surface Wiring via Homogeneous Electroplating

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Solution Overview

Problem

The existing manufacturing processes for semiconductor packages with terminals on both chip surfaces require different methods and materials for top and bottom surface wiring, leading to increased complexity and cost, as well as lower thermal reliability due to the use of high-melting-point solders and sintered metals.

Innovation Solution

A semiconductor package design that uses a first insulating film with vias and wiring on top and a bonding film with vias and wiring underneath, both connected to the semiconductor chip, allowing for the same electroplating method to form wiring on both surfaces, using materials like copper for high thermal reliability and simplifying the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If different methods and materials are used for top and bottom surface wiring, then electrical connectivity is achieved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies homogeneity by using the same electroplating method and copper material for both top surface wiring (first wiring) and bottom surface wiring (second wiring). This eliminates the need for different bonding processes, reducing manufacturing complexity while maintaining reliable electrical connectivity through consistent material properties and process parameters

Inventive Principle:
Principle #33Homogeneity

2Strength

If high-melting-point solders and sintered metals are used for bonding, then mechanical strength is achieved, but thermal reliability decreases

Engineering Contradiction:
Improvebonding strengthVSAvoidthermal reliability
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent changes the material parameter from high-melting-point solders and sintered metals to copper with lower melting point but superior thermal conductivity. This parameter change achieves adequate bonding strength through electroplating while dramatically improving thermal reliability, allowing the package to withstand higher operating temperatures without degradation

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If different materials are used for first insulating film and bonding film, then functional requirements are met, but manufacturing complexity increases

Engineering Contradiction:
Improvefunctional adaptabilityVSAvoidmanufacturing ease
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent uses copper as the common material for both first wiring and second wiring through electroplating, creating homogeneous manufacturing processes. While the insulating films may differ in material composition to meet functional requirements, the wiring fabrication uses identical methods and materials, significantly simplifying manufacturing while maintaining functional versatility

Inventive Principle:
Principle #33Homogeneity

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design simplifies the manufacturing process, reduces costs, and enhances thermal reliability by allowing the same method and material to be used for both chip surfaces, improving electrical connectivity and handling of the semiconductor package.

Implementation Method 1

bonding a semiconductor chip over a first substrate with a bonding film interposed therebetween

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

allowing for the same electroplating method to form wiring on both surfaces

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS9721900B2Semiconductor package and its manufacturing method
Publication Date: 2017.08.01 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US9721900B2 patent drawing
  • US9721900B2 patent drawing
  • US9721900B2 patent drawing

AI summary

Provided is a bonding method to construct a bonding with high thermal reliability between electrodes formed on both chip surfaces of a semiconductor device and wiring. The bonding method includes: bonding a semiconductor chip over a first substrate with a bonding film interposed therebetween; forming a first insulating film over the semiconductor chip; forming a first via in the first insulating film; forming a first wiring over the first insulating film so as to be electrically connected to the semiconductor chip through the first via; forming a second via in the bonding film; and forming a second wiring under the semiconductor chip so as to be electrically connected to the semiconductor chip through the second via.