Semiconductor Package Thermal Path for Chip Hotspot Dissipation

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Solution Overview

Problem

High-temperature regions within semiconductor chips reduce power performance, and existing heat dissipation methods weaken chip performance.

Innovation Solution

A semiconductor package design incorporating a substrate, semiconductor chip with hotspots, dummy pads, pillars, and a thermal interface material layer with recesses to enhance heat dissipation through conduction and convection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If power is reduced to control temperature, then temperature is reduced, but performance of semiconductor chips is weakened

Engineering Contradiction:
ImprovetemperatureVSAvoidperformance
Core Design Contradiction:
TemperatureVSPower

Solution Approach 1:

The patent extracts the heat dissipation function from the power management system by introducing separate thermal management components (heat slug, thermal interface material, pillars) that independently remove heat from hotspots without affecting the operational power of the semiconductor chip

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces intermediary thermal management components (thermal interface material layer, heat slug, pillars) that mediate between the hotspot and the environment, enabling heat removal without directly interfering with chip performance

Inventive Principle:
Principle #24Intermediary (Mediator)

2Temperature

If thermal interface material layer fills the recess completely, then heat dissipation is improved, but manufacturing precision becomes more difficult to control

Engineering Contradiction:
Improveheat dissipationVSAvoidfilling precision
Core Design Contradiction:
TemperatureVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating a recess with specific geometric characteristics (wider at top, narrower at bottom) that ensures adequate thermal interface material placement in the critical heat transfer zone without requiring complete filling of the entire recess volume

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs partial action by designing the recess geometry and thermal interface material application process to achieve sufficient heat dissipation without requiring complete filling of the recess, thereby reducing manufacturing complexity

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Effectively dissipates heat from hotspots without compromising semiconductor chip performance, utilizing multiple heat dissipation structures for efficient thermal management.

Implementation Method 1

a thermal interface material layer on the mold film, and a heat slug on the thermal interface material layer

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

the mold film includes a first recess recessed inwardly from the sixth surface of the mold film, and at least part of the thermal interface material layer fills a first space defined between an area of the sixth surface of the mold film where the first recess is formed and an interface of the first recess where the mold film and the first pillar are in contact

Methodology Applied
Scientific EffectConvection: Convection

Data Source

PatentUS20260033330A1Semiconductor package
Publication Date: 2026.01.29 SAMSUNG ELECTRONICS CO LTD
  • US20260033330A1 patent drawing
  • US20260033330A1 patent drawing
  • US20260033330A1 patent drawing

AI summary

A semiconductor package includes a substrate including a first surface and a second surface, and a first substrate pad on the second surface, a first semiconductor chip on the second surface and including a third surface and a fourth surface, a first hotspot within the first semiconductor chip, and a first chip pad on the fourth surface, a first dummy pad on the fourth surface, a first layer connecting the first hotspot and the first dummy pad, a first pillar on the first dummy pad, a mold film on the substrate and including a fifth surface and a sixth surface, a thermal interface material layer on the mold film, and a heat slug on the thermal interface material layer; the mold film includes a first recess recessed inwardly from the sixth surface of the mold film, and at least part of the thermal interface material layer is in the recess.