Semiconductor Package Infrared Blocking Layer Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor device packages face issues with EMI shielding and infrared blocking layers made of metal materials being prone to scratches or peeling during manufacturing, leading to reduced functionality and increased package size due to wider scribe lines required for sidewall protection in wafer level chip scale packages, which compromises layout efficiency.
Innovation Solution
The semiconductor device package incorporates an infrared blocking layer with integral first and second portions, surrounded by a side protection layer and topped with an upper protection layer of different materials, including solder resist and thermally conductive metals, to enhance protection and reduce package size by using a photosensitive material for the upper protection layer to facilitate marking and lithography processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal layers are used for EMI shielding and infrared blocking, then EMI protection and infrared isolation functions are achieved, but the package size increases and layout efficiency decreases
Solution Approach 1:
The protection layer is segmented into different portions: a first portion covering the top surface and a second portion covering the sidewalls. This segmentation allows optimized material selection and thickness for each region, achieving EMI shielding and infrared blocking functions while minimizing overall package size.
Solution Approach 2:
Different regions of the protection layer have different properties - the first portion has optimized thickness and material for top surface protection, while the second portion has different thickness and material composition for sidewall protection. This local quality optimization reduces overall package size while maintaining necessary shielding functions.
2Reliability
If wider scribe lines are used for sidewall protection in wafer level chip scale packages, then protection is improved, but layout efficiency is reduced
Solution Approach 1:
The protection structure extends from the top surface into the vertical dimension along the sidewalls. By utilizing the vertical dimension for protection, the horizontal scribe line width can be minimized, thereby improving layout efficiency while maintaining sidewall protection through the second portion of the protection layer.
3Reliability
If metal materials are used for infrared blocking layer, then EMI shielding function is achieved, but the layer becomes prone to scratches and peeling during manufacturing
Solution Approach 1:
The protection layer uses composite material structure with the infrared blocking layer forming the base and the protection layer material (different from metal) forming the outer protective coating. This composite structure provides both EMI shielding from the infrared blocking layer and enhanced mechanical strength against scratches and peeling from the protection layer.
Solution Approach 2:
The protection layer is applied beforehand to cover and protect the metal infrared blocking layer during subsequent manufacturing processes. This prior cushioning prevents direct exposure of the fragile metal layer to mechanical stresses, thereby preventing scratches and peeling while maintaining EMI shielding function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents damage to the infrared blocking layer, maintains EMI shielding and infrared isolation functions, and reduces package size by minimizing the need for additional space for electrical connections, thereby improving layout efficiency and protection.
Implementation Method 1
The upper protection layer and the side protection layer are formed of different materials. The upper protection layer is formed of a photosensitive material
Data Source
AI summary
A semiconductor device package includes an electronic component, an infrared blocking layer, an upper protection layer and a side protection layer. The infrared blocking layer includes a first portion disposed over the electronic component. The infrared blocking layer includes a second portion surrounding the electronic component. The first portion is integral with the second portion. The upper protection layer is disposed on the first portion of the infrared blocking layer. The side protection layer is disposed on the second portion of the infrared blocking layer. The upper protection layer and the side protection layer are formed of different materials.