Semiconductor Package Insulated Conductive Patterns ESD Protection

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Solution Overview

Problem

Semiconductor packages face challenges in achieving compactness, low power consumption, high speed, reliability, and better image quality while preventing electrostatic discharge (ESD) and moisture ingress, which affect the reliability and performance of image sensor devices.

Innovation Solution

The semiconductor package design includes a package substrate with insulated conductive patterns, a semiconductor chip mounted on the substrate, a holder attached with an adhesive layer, and a transparent substrate overlapping the chip, where the adhesive layer electrically insulates the conductive patterns from ESD sources and moisture, enhancing reliability by preventing static discharge and moisture penetration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the holder is attached directly to the package substrate without adhesive layer insulation, then the structural simplicity is improved, but the reliability deteriorates due to ESD damage and moisture ingress

Engineering Contradiction:
Improvestructural simplicityVSAvoidprotection against ESD and moisture
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

An adhesive layer is introduced as an intermediary between the holder and the package substrate. This adhesive layer serves dual functions: it provides mechanical attachment and simultaneously acts as an electrical insulator to protect conductive patterns from ESD damage and prevent moisture ingress, thereby resolving the contradiction between structural simplicity and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the adhesive layer is positioned to contact conductive patterns, then the reliability is improved by preventing ESD and moisture damage, but the device complexity increases

Engineering Contradiction:
Improveprotection against ESD and moistureVSAvoidadhesive layer positioning and configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protective function is extracted and integrated into the adhesive layer itself. By positioning the adhesive layer to contact the conductive patterns, the same material that provides mechanical attachment also provides electrical insulation and moisture protection, eliminating the need for separate protective structures and thus managing complexity while enhancing reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If compact packaging is implemented, then the productivity and space utilization are improved, but the reliability deteriorates due to increased susceptibility to ESD and moisture

Engineering Contradiction:
Improvespace utilizationVSAvoidprotection against environmental factors
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The adhesive layer is designed to perform multiple functions simultaneously: mechanical attachment of the holder, electrical insulation of conductive patterns, and moisture barrier protection. This multi-functionality allows compact packaging to maintain reliability without requiring additional protective components that would increase size.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively prevents ESD damage and moisture ingress, improving the reliability and performance of semiconductor packages by ensuring the conductive patterns remain insulated, thus reducing the likelihood of electrical failure and maintaining performance in high humidity environments.

Implementation Method 1

the adhesive layer electrically insulates the conductive patterns from ESD sources and moisture

Methodology Applied
Scientific EffectElectrical insulation: Electrical Resistance

Data Source

PatentUS9634046B2Semiconductor packages including electrical insulation features
Publication Date: 2017.04.25 SAMSUNG ELECTRONICS CO LTD
  • US9634046B2 patent drawing
  • US9634046B2 patent drawing
  • US9634046B2 patent drawing

AI summary

A semiconductor package can include a substrate and a semiconductor chip inside the semiconductor package mounted on the substrate. A first conductive pattern can be on the substrate inside the semiconductor package and can be electrically connected to an input/output of the semiconductor chip. A holder can be on the substrate, where the holder can be configured to provide a recess in which the semiconductor chip is located. An electrically insulating adhesive layer can be configured to electrically insulate the first conductive pattern from an Electric Static Discharge (ESD) source located outside the semiconductor package and configured to adhere the holder to the substrate.