Semiconductor Package Connection System with Integrated Interposer

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Solution Overview

Problem

Current semiconductor package connection systems face challenges in efficiently connecting application processors (AP) and memory packages without using separate interposers or backside redistribution layers, and in optimizing the placement of power management ICs (PMICs) for effective power management and heat dissipation.

Innovation Solution

A connection system where an AP and PMIC are mounted side by side on one surface of a printed circuit board, with a memory package mounted on the opposite surface, eliminating the need for separate interposers or backside redistribution layers, and utilizing a printed circuit board with build-up layers and vias to facilitate direct electrical connections and heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an interposer or backside redistribution layer is used to connect memory package and AP package, then electrical connection is achieved, but device complexity and package size increase

Engineering Contradiction:

Improveelectrical connectionVSAvoidpackage structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the interposer substrate and the main printed circuit board into a single integrated structure. The interposer substrate is formed as an extension of the main PCB, eliminating the need for separate interposer components and reducing overall package complexity while maintaining electrical connection functionality between the memory package and AP package.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The printed circuit board serves multiple functions simultaneously: it acts as the main substrate for mounting components, provides the interposer functionality for electrical redistribution, and enables thermal management pathways. This multi-functionality eliminates the need for dedicated separate structures for each function, reducing device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If an interposer or backside redistribution layer is used to connect memory package and AP package, then electrical connection is achieved, but package size increases

Engineering Contradiction:

Improveelectrical connectionVSAvoidpackage size

Core Design Contradiction:

ReliabilityVSVolume of moving object

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

3Reliability

If PMIC is disposed separately from AP package and memory package, then power management is achieved, but power transfer path length increases

Engineering Contradiction:

Improvepower managementVSAvoidpower transfer path

Core Design Contradiction:

ReliabilityVSLength of moving object

Solution Approach 1:

The patent uses the integrated interposer substrate as an intermediary structure that provides optimized power transfer pathways. The substrate includes dedicated power delivery networks and redistribution layers that efficiently conduct power from the PMIC to both the AP and memory packages, minimizing path length and electrical resistance while maintaining separate power management functionality.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Ease of manufacture

If conventional separate package mounting is used, then component placement is achieved, but heat dissipation efficiency decreases

Engineering Contradiction:

Improvecomponent placementVSAvoidheat dissipation

Core Design Contradiction:

Ease of manufactureVSTemperature

Solution Approach 1:

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10453821B2Connection system of semiconductor packages

Publication Date: 2019.10.22 SAMSUNG ELECTRONICS CO LTD

AI summary

A connection system of semiconductor packages includes: a printed circuit board having a first surface, and a second surface, opposing the first surface; a first semiconductor package disposed on the first surface of the printed circuit board and connected to the printed circuit board through first electrical connection structures; and a second semiconductor package disposed on the second surface of the printed circuit board and connected to the printed circuit board through second electrical connection structures. The first semiconductor package includes an application processor (AP) and a power management integrated circuit (PMIC) disposed side by side, and the second semiconductor package includes a memory.