Semiconductor Package Thermal Dissipation via Intermediary Substrate

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Solution Overview

Problem

Semiconductor packages with stacked chips face thermal isolation issues, particularly for the bottom chip, leading to reliability problems due to poor heat dissipation, as it is thermally isolated from the metal cap.

Innovation Solution

A semiconductor package design that includes two chips, two substrates, and a metal cap, where the second substrate is positioned between the chips and both are enclosed within the metal cap, ensuring both chips are thermally connected through the substrate and the cap for enhanced heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If stacked chips are attached by adhesive and mounted on substrate, then packaging density is increased, but bottom chip heat dissipation deteriorates

Engineering Contradiction:
Improvepackaging densityVSAvoidbottom chip heat dissipation
Core Design Contradiction:
Quantity of substanceVSTemperature

Solution Approach 1:

A heat dissipation substrate is introduced as an intermediary component between the bottom chip and the metal cap. This substrate provides a dedicated thermal conduction path, allowing heat from the bottom chip to be efficiently transferred to the metal cap without compromising the stacked chip configuration. The intermediary substrate resolves the thermal isolation problem while maintaining high packaging density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The heat dissipation function is segmented from the mechanical support function. The metal cap serves as the primary heat dissipation component, while the heat dissipation substrate acts as a thermal interface layer. This segmentation allows optimization of each component's function - the metal cap for thermal radiation and convection, and the substrate for thermal conduction from the chip.

Inventive Principle:
Principle #1Segmentation

2Temperature

If second substrate is disposed between chips, then thermal connection is improved, but device complexity increases

Engineering Contradiction:
Improvethermal connectionVSAvoidpackage structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The heat dissipation substrate is designed to serve multiple functions simultaneously: it provides thermal conduction from the bottom chip, offers mechanical support for mounting the chips, and acts as a structural element within the metal cap. This multi-functionality reduces the need for separate dedicated components, thereby limiting the increase in device complexity while achieving improved thermal connection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves thermal and electrical performance by ensuring all chips in the package, including the bottom chip, benefit from effective heat dissipation, enhancing the reliability and compactness of the semiconductor package.

Implementation Method 1

The stacked chips are typically attached to one another by an adhesive, mounted on a substrate and wire bonded to the substrate. The stacked chips can be disposed within a metal cap mounted on the substrate to improve heat dissipation.

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

The chip at the top of the stack may have good heat dissipation through the metal cap. However, the chip at the bottom of the stack may have poor heat dissipation since it is thermally isolated from the metal cap

Methodology Applied
Scientific EffectHeat dissipation: Heat Sink

Data Source

PatentUS8916958B2Semiconductor package with multiple chips and substrate in metal cap
Publication Date: 2014.12.23 INFINEON TECHNOLOGIES AG
  • US8916958B2 patent drawing
  • US8916958B2 patent drawing
  • US8916958B2 patent drawing

AI summary

A semiconductor package includes a first semiconductor chip, a second semiconductor chip, a first substrate, a second substrate and a metal cap. The chips are electrically connected to the first substrate, the second substrate is disposed between the chips, and the chips and the second substrate are disposed within the metal cap.