Semiconductor Package Interposer Assembly Without Laser Drilling
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Solution Overview
Problem
Conventional semiconductor packages face challenges in supporting high integration levels due to the limitations of printed circuit boards, which often fail to accommodate the increased complexity and miniaturization of electronic devices, necessitating a solution that effectively connects multiple semiconductor chips.
Innovation Solution
A semiconductor package design incorporating an interposer with conductive connectors and an insulating filler, where the interposer is connected to the package substrate through conductive connectors that penetrate the molding layer, ensuring secure attachment and alignment, and the insulating filler surrounds the connectors to enhance reliability and reduce manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional printed circuit boards are used to support semiconductor chips, then the package structure is simple, but the package fails to support high integration levels and increased complexity
Solution Approach 1:
An interposer is introduced as an intermediary component between the package substrate and semiconductor chips. The interposer includes an interposer substrate with through holes and conductive connectors, serving as a mediator that enables high integration while maintaining structural organization. This intermediary structure allows multiple chips to be connected through the interposer, achieving high integration capability without overwhelming complexity in the overall package design.
Solution Approach 2:
The package structure is segmented into distinct functional layers: package substrate, molding layer, interposer with through holes, and semiconductor chips. This segmentation allows each component to perform its specific function independently, making the complex high integration structure manageable and manufacturable through standardized processes.
2Manufacturing precision
If laser drilling is used to create through holes in the molding layer, then precise alignment is achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The through holes are formed in the molding layer before the semiconductor chips are mounted and before final assembly. This preliminary action allows for precise alignment to be established early in the manufacturing process, and subsequent components can be aligned to these pre-formed holes, maintaining precision while simplifying the overall manufacturing sequence.
Solution Approach 2:
The patent replaces complex laser drilling operations with simpler mechanical or chemical etching methods to form through holes in the molding layer. This substitution maintains sufficient alignment precision for the application while significantly reducing manufacturing complexity and cost compared to laser drilling processes.
3Reliability
If conductive connectors are placed in through holes without insulation, then electrical connection is achieved, but reliability decreases due to potential short circuits and misalignment
Solution Approach 1:
An insulating filler material is introduced as an intermediary substance that fills the through holes and surrounds the conductive connectors. This insulating layer prevents electrical short circuits between adjacent connectors while providing mechanical support and alignment reference, thereby enhancing connection reliability without requiring complex connector designs.
Solution Approach 2:
The through hole structure employs composite materials: conductive connectors for electrical connection, insulating filler material for isolation and support, and molding layer for structural integrity. This composite approach achieves reliable electrical connections with proper isolation, preventing shorts and misalignment issues while maintaining a relatively simple overall structure.
Data Source
AI summary
A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a molding layer covering side walls of the first semiconductor chip and including through holes, an interposer on the first semiconductor chip and the molding layer, conductive connectors in the through holes of the molding layer and connected to the first package substrate and the interposer, and an insulating filler including a first portion that fills the through holes of the molding layer so as to surround side walls of the conductive connectors.


