Semiconductor Package With Interposer EMI Shielding
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Solution Overview
Problem
Conventional semiconductor package structures face challenges in minimizing Electromagnetic Interference (EMI) while maintaining miniaturization and protecting chips from damage during manufacturing, as they require exposing chips to the ambient for extended periods, increasing the risk of damage and package size.
Innovation Solution
A semiconductor package structure and manufacturing method that involves individually encapsulating chips using a substrate, interposer, and encapsulant material, with the interposer providing electrical connections and a metal layer for EMI shielding, allowing for separate or simultaneous encapsulation of chips to reduce exposure and package size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a conductive element is added between two chips to interrupt EMI, then EMI shielding is improved, but the package structure size increases and chip exposure time increases
Solution Approach 1:
The interposer is nested within the substrate, with the opening in the substrate accommodating the interposer structure. The conductive element is integrated within the interposer rather than being an external addition, allowing EMI shielding functionality to be embedded within the existing package structure without increasing overall size.
Solution Approach 2:
The conductive element is positioned in the vertical dimension within the interposer structure rather than extending horizontally between chips. This vertical integration allows EMI shielding without increasing the horizontal package footprint, effectively using the Z-dimension to solve the EMI problem while maintaining miniaturization.
2Object-affected harmful factors
If a conductive element is added between two chips to interrupt EMI, then EMI shielding is improved, but chip exposure time increases
Solution Approach 1:
The interposer with the integrated conductive element is prepared in advance and positioned within the substrate before the chips are mounted. This preliminary preparation of the EMI shielding structure eliminates the need to add conductive elements after chip assembly, reducing the time chips are exposed during the manufacturing process.
3Reliability
If chips are individually encapsulated, then chip protection is improved, but manufacturing complexity increases
Solution Approach 1:
The encapsulation process is segmented into two independent molding operations: first molding the interposer within the substrate, and second molding the chips onto the interposer. This segmentation allows each encapsulation step to be performed separately and independently, simplifying the manufacturing process compared to attempting simultaneous encapsulation of the entire assembly.
Data Source
AI summary
A semiconductor package structure and a method for manufacturing the same are disclosed. The semiconductor package structure includes a substrate, an interposer (such as a circuitry laminate), a metal layer formed on the interposer, a first chip and a second chip, wherein the interposer is disposed on the substrate and covers at least a portion of an opening of the substrate, thereby defining a space for receiving the first chip, and the second chip is disposed on the metal layer or the interposer. The metal layer is electrically connected to the substrate and grounded. The first chip is electrically connected to the substrate.