Semiconductor Package Land Arc Geometry for Solder Joint Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional SMD and NSMD type semiconductor packages face reliability issues due to crack generation near the adhesion area of external terminals and lands, and decreased terminal density, which affects solder joint reliability and wiring line integrity.
Innovation Solution
A semiconductor package design featuring a substrate with lands having a complex arc structure, where a portion is covered by a mask layer and another portion is exposed, allowing external terminals to adhere to both the land and its sidewall, combining the advantages of SMD and NSMD types to enhance adhesion reliability and terminal density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external terminals are adhered to lands in SMD type semiconductor package, then adhesion is improved, but cracks are generated near the adhesion area after solder joint reliability test
Solution Approach 1:
The patent applies local quality by creating different land exposure configurations in different areas of the substrate. Some lands are fully exposed (NSMD type) while others are partially covered by solder mask (SMD type), allowing each region to have optimized properties for its specific function and stress conditions.
Solution Approach 2:
The patent segments the land configuration into multiple types across the substrate surface. By dividing the connection areas into different exposure patterns, the design distributes stress more evenly and prevents concentrated cracking that occurs in uniform SMD or NSMD configurations.
2Reliability
If external terminals are adhered to both boundaries and wiring lines in NSMD type semiconductor package, then adhesion area is increased, but terminal density decreases
Solution Approach 1:
The patent uses local quality by assigning different land exposure types to different regions. Areas requiring higher adhesion use NSMD configuration with exposed boundaries, while areas requiring higher density use SMD configuration with mask-covered boundaries, optimizing both properties simultaneously.
Data Source
AI summary
A printed circuit board providing high reliability using a packaging of high capacity semiconductor chip, a semiconductor package, and a card and a system using the semiconductor package. The semiconductor package includes a substrate having a first surface and a second surface, a semiconductor chip mounted on the first surface of the substrate, at least one land disposed on the second surface of the substrate, and whose circumference includes a plurality of first group arcs, a mask layer covering the second surface of the substrate and including at least one opening that exposes the at least one land, and at least one external terminal disposed on the at least one land, wherein a portion of the at least one land is covered by the mask layer, and a sidewall of another portion of the at least one land is exposed by the at least one opening, and the circumference of the at least one opening includes a plurality of second group arcs, and a radius of the outermost arc from among the plurality of first group arcs is equal to a radius of the outermost arc from among the plurality of second group arcs.