Semiconductor Package Landing Pad Bonding via Vertical Conductive Connectors

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Solution Overview

Problem

The miniaturization of semiconductor package structures leads to insufficient bonding strength and reduced landing areas for electrical connections, affecting the reliability and yield rate of the overall package.

Innovation Solution

A semiconductor package structure with a first redistribution layer comprising stacked conductive patterns and dielectric layers, where each landing pad is separated from the dielectric layer, enhancing the bonding area and strength for conductive connectors, and a manufacturing method involving the formation of these layers to improve the package's reliability and yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the semiconductor package structure is miniaturized, then the size of the package is reduced, but the landing area of the landing pad is reduced and bonding strength is insufficient

Engineering Contradiction:
Improvepackage sizeVSAvoidlanding area
Core Design Contradiction:
Volume of moving objectVSArea of moving object

Solution Approach 1:

The patent transitions from a two-dimensional landing pad structure to a three-dimensional structure by forming conductive connectors that extend vertically from the landing pad through the dielectric layer. This dimensional change allows the landing area to be expanded in the vertical direction while maintaining a compact horizontal footprint, thereby resolving the contradiction between package miniaturization and sufficient landing area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The conductive connector is nested within the dielectric layer, with the landing pad at the bottom and the conductive connector extending upward through the dielectric layer to the top surface. This nesting structure allows the conductive connector to be embedded within the package structure without increasing the overall package volume, thus maintaining miniaturization while providing sufficient bonding area.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Strength

If the landing area is expanded to enhance bonding strength, then the bonding strength is improved, but the package size increases

Engineering Contradiction:
Improvebonding strengthVSAvoidpackage size
Core Design Contradiction:
StrengthVSVolume of moving object

Solution Approach 1:

Instead of expanding the landing pad area in the horizontal plane, the patent extends the bonding interface vertically by forming conductive connectors that protrude from the top surface of the dielectric layer. This vertical extension increases bonding strength without increasing the horizontal package footprint, thus resolving the contradiction between bonding strength and package size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The conductive connector provides localized enhancement of bonding strength at critical connection points where elements are mounted on the top surface. The connector has a larger cross-sectional area at the bonding interface compared to the landing pad area, concentrating the bonding strength enhancement where it is most needed without increasing overall package volume.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11437336B2Semiconductor package structure with landing pads and manufacturing method thereof
Publication Date: 2022.09.06 POWERTECH TECHNOLOGY INC
  • US11437336B2 patent drawing
  • US11437336B2 patent drawing
  • US11437336B2 patent drawing

AI summary

A semiconductor package structure includes a first redistribution layer, a plurality of conductive connectors, a chip, and an encapsulant. The first redistribution layer has a first surface and a second surface opposite to the first surface. The first redistribution layer includes at least one conductive pattern and at least one dielectric layer stacked on each other. The conductive pattern includes a plurality of landing pads, and each of the landing pads is separated from the dielectric layer. The conductive connectors are located on the first surface. Each of the conductive connectors is corresponding to and electrically connected to one of the landing pads. The chip is located on the first surface. The chip is electrically connected to the first redistribution layer. The encapsulant encapsulates the chip and the conductive connectors. A manufacturing method of a semiconductor package structure is also provided.