Semiconductor Package Carrier Substrate With Patterned Lead Frame
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Solution Overview
Problem
Conventional Through Substrate Vias (TSV) processing in wafer level packaging is costly and complex, and existing Package-on-Package (PoP) structures are limited by solder ball size and pitch, restricting component density and requiring complex processes.
Innovation Solution
A semiconductor package design featuring a carrier substrate with patterned lead frames, dielectric layers, and via contacts that allows for interconnections between die pads and package contacts, enabling finer pitch PoP packages without the need for temporary carriers and complex singulation steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solder balls are used for interconnection between packages, then electrical connection is achieved, but package pitch is restricted by ball size and ball pitch
Solution Approach 1:
The patent extracts the solder ball from the interconnection system and replaces it with a direct lead frame contact pad structure. The lead frame extends through the package substrate to provide electrical connection without requiring solder balls, thereby eliminating the pitch constraints imposed by solder ball dimensions.
Solution Approach 2:
Instead of using solder balls to connect packages, the invention inverts the approach by using lead frame contacts that extend through the substrate to make direct electrical connection. This reverses the traditional solder ball-based interconnection method and enables finer pitch packaging.
2Productivity
If conventional TSV processing is used, then wafer level packaging is achieved, but temporary carriers are required which increase cost and complexity
Solution Approach 1:
The patent removes the temporary carrier from the TSV processing system. The lead frame is directly attached to the wafer and serves as both the mounting structure and the electrical interconnection, eliminating the need for separate temporary carrier substrates and their associated handling complexity.
Solution Approach 2:
The lead frame performs multiple functions: it serves as the mechanical mounting structure for the wafer, provides electrical interconnection between packages, and acts as the structural support element. This multi-functionality eliminates the need for separate temporary carriers that would otherwise be required.
3Quantity of substance
If existing PoP structures are used, then component packaging is achieved, but finer pitch is limited by solder ball dimensions
Solution Approach 1:
The invention removes solder balls from the PoP structure and replaces them with lead frame contact pads that extend through the package substrate. This extraction of the solder ball constraint enables实现ation of finer pitch PoP packages with higher component density.
4Ease of manufacture
If complex singulation steps are used, then TSV wafer processing is completed, but handling difficulty increases
Solution Approach 1:
The patent eliminates complex singulation steps by maintaining the lead frame-wafer assembly as an integrated unit throughout processing. The lead frame provides continuous structural support, allowing the thin TSV wafer to be handled and processed without requiring complex singulation operations.
Data Source
AI summary
A device is disclosed. The device includes a carrier substrate having first and second major surfaces. The first surface includes a die region and contact pads and the second surface includes package contacts. The carrier substrate includes a patterned lead frame which defines a line level with conductive traces and a via level with via contacts. The patterned lead frame provides interconnections between the contact pads and package contacts. The carrier substrate further includes a dielectric layer isolating the conductive traces and via contacts. The device includes a die mounted on the die region of the first surface.