Multi-Chip Semiconductor Package with Leadframe Carrier
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Solution Overview
Problem
Current semiconductor component manufacturing methods face challenges in integrating multiple semiconductor chips efficiently, particularly due to difficulties in manufacturing mixed wire bonds and the complexity and cost of signal traces on printed circuit boards, which hinder cost-effective production of Multi-Chip Modules (MCMs) with bare semiconductor dice.
Innovation Solution
The method involves mounting a leadframe with openings on adhesive material, attaching encapsulated semiconductor components, and bonding bare semiconductor dice to the leadframe leads using wire bonds, which reduces mechanical stresses and eliminates the need for advanced wire bonding designs, allowing for the integration of multiple dice in a single package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If mixed semiconductor dice with different wire bond types are integrated in a single package, then functionality is increased, but manufacturing difficulty increases due to incompatible wire bond requirements
Solution Approach 1:
The invention divides the multi-die integration problem into separate manageable units by using an intermediate carrier substrate. Each semiconductor die is mounted and wire-bonded independently on the carrier, allowing different wire bond types (aluminum for power, gold for signal) to be used for different dies without interfering with each other. This segmentation resolves the manufacturing difficulty while maintaining the functionality benefits of mixed-die integration.
Solution Approach 2:
The intermediate carrier substrate acts as a mediator between the semiconductor dies and the final package. It provides a common platform that accepts different wire bond types and facilitates their integration without requiring direct compatibility between different die types. The carrier substrate with its leadframe structure serves as the intermediary that reconciles the incompatible wire bond requirements of different semiconductor technologies.
2Reliability
If printed circuit board substrate with signal traces is used to connect semiconductor dice, then signal transmission is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The invention extracts the complex printed circuit board substrate and its signal trace requirements from the multi-die integration process. Instead of using a PCB with manufactured signal traces, the solution uses direct wire bonding from the semiconductor die bond pads to the leadframe leads on the carrier substrate. This extraction eliminates the need for complex PCB trace manufacturing while maintaining reliable electrical connections through the wire bonds.
Solution Approach 2:
The invention uses the leadframe leads on the carrier substrate as simplified copies or equivalents of the complex PCB signal traces. Rather than manufacturing intricate copper traces on a PCB substrate, the leadframe provides direct conductive paths that replicate the signal transmission function in a much simpler manufacturing process, reducing both complexity and cost while maintaining electrical connectivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces costs, and enhances the integration of multiple semiconductor dice in a single package by minimizing mechanical stresses and eliminating complex wire bonding requirements, while maintaining efficient signal transmission.
Implementation Method 1
Wire bonds are formed between bond pads on the bare semiconductor die and leadframe leads
Implementation Method 2
A leadframe having at least one opening is mounted to an adhesive material such as, for example, a mold tape
Implementation Method 3
An encapsulated semiconductor component is mounted to the portion of the adhesive material exposed by the opening
Data Source
AI summary
A semiconductor component comprising two stacked semiconductor dice and a method of manufacture. A leadframe having an active area that includes leadframe leads and a cavity is mounted to a support material such as an adhesive tape. A packaged semiconductor die that includes a first semiconductor die mounted to a support structure and encapsulated within a mold compound is mounted on the adhesive tape. A second semiconductor die is mounted to the packaged semiconductor die. Bond pads on the second semiconductor die are electrically connected to the leadframe, the support structure on which the first semiconductor die is mounted, or both. A mold compound is formed around the second semiconductor die, portions of the leadframe, and the packaged semiconductor die. The adhesive tape is removed and the leadframe is singulated to form multi-chip packages.