Semiconductor Package With Porous Liquid Metal Barrier

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor packages face challenges in efficiently dissipating heat and preventing leakage of thermal interface material, which affects their performance and reliability.

Innovation Solution

A semiconductor package design incorporating a porous barrier structure made of metal material with air-permeable pores surrounding the thermal interface material layer, which includes liquid metal, to enhance heat dissipation and prevent material leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a thermal interface material layer is used between the semiconductor chip and heat dissipation member, then heat dissipation efficiency is improved, but the thermal interface material may leak to the outside of the semiconductor package

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoidthermal interface material leakage
Core Design Contradiction:
TemperatureVSLoss of substance

Solution Approach 1:

The patent employs a porous barrier structure made of metal material with controlled porosity to contain the thermal interface material layer. The porous structure allows the material to be held in place through capillary forces while maintaining structural integrity, preventing leakage without compromising thermal contact between the semiconductor chip and heat dissipation member.

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The invention uses a composite structure combining metal material with porous characteristics to form the barrier structure. This composite approach provides both mechanical strength to maintain package integrity and porous properties to contain the thermal interface material, solving the leakage problem while preserving heat dissipation functionality.

Inventive Principle:
Principle #40Composite materials

2Volume of moving object

If the semiconductor package is miniaturized for high performance, then device size is reduced, but heat dissipation becomes more challenging

Engineering Contradiction:
Improvepackage sizeVSAvoidheat dissipation capability
Core Design Contradiction:
Volume of moving objectVSTemperature

Solution Approach 1:

The patent applies local quality by creating a porous barrier structure with specific porosity characteristics in the region where thermal interface material containment is needed. This localized porous structure provides heat dissipation functionality while preventing material leakage, allowing miniaturization without sacrificing thermal management capability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves heat generation efficiency and reduces thermal interface material leakage, thereby enhancing the performance and reliability of semiconductor packages by effectively managing heat dissipation and maintaining material integrity.

Implementation Method 1

a porous barrier structure formed of a metal material and surrounding the bonding enhancing layer and the thermal interface material layer

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Implementation Method 2

a thermal interface material layer on the bonding enhancing layer and in a gap between the bonding enhancing layer and the heat dissipation member wherein the thermal interface material layer includes a liquid metal

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20240079366A1Semiconductor package
Publication Date: 2024.03.07 SAMSUNG ELECTRONICS CO LTD
  • US20240079366A1 patent drawing
  • US20240079366A1 patent drawing
  • US20240079366A1 patent drawing

AI summary

A semiconductor package includes a package substrate, a semiconductor chip on the package substrate and having a first surface facing the package substrate and a second surface, opposite to the first surface, an encapsulant disposed on the package substrate and on a side surface of the semiconductor chip, a heat dissipation member on the semiconductor chip and spaced apart from the semiconductor chip, a bonding enhancing layer on the second surface of the semiconductor chip, a thermal interface material layer on the bonding enhancing layer and in a gap between the bonding enhancing layer and the heat dissipation member, wherein the thermal interface material layer includes liquid metal, and a porous barrier structure formed of a metal material and surrounding the bonding enhancing layer and the thermal interface material layer.