Semiconductor Package Molding Body with Mask Layer
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Solution Overview
Problem
The existing methods for connecting passive components and chips on printed circuit boards result in a large area and thickness overhead due to the routing of these components, necessitating a reduction in this overhead.
Innovation Solution
A semiconductor package is developed using a novel mask layer structure and a direct exposed molding process, where components and chips are integrated in the same mold body, eliminating the need for a grinding process and allowing for a redistribution layer to interconnect them, thereby reducing yield loss and enhancing connection efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If passive components and chips are distributed on the printed circuit board and connected by routings, then electrical connection is achieved, but area overhead and thickness overhead increase
Solution Approach 1:
The patent merges passive components and chips into a single integrated package structure, eliminating the need for separate routing traces on the printed circuit board. The components are positioned in close proximity and interconnected through internal wiring structures within the package, reducing the overall area required while maintaining electrical connectivity.
Solution Approach 2:
The patent transitions from a planar distribution of components on the PCB surface to a three-dimensional stacked arrangement within the package. By utilizing vertical stacking and layered interconnections, the design reduces the footprint area while maintaining all necessary electrical connections through multiple interconnection layers and vias.
2Reliability
If passive components and chips are distributed on the printed circuit board and connected by routings, then electrical connection is achieved, but thickness overhead increases
Solution Approach 1:
The patent combines multiple components into a single integrated package, eliminating the need for thick PCB routing layers and multiple separate component mountings. The internal package structure provides direct, short interconnections between components, reducing the overall thickness compared to distributed PCB mounting with extensive routing.
3Area of stationary object
If components and chips are integrated in the same mold body using direct exposed molding process, then area overhead and thickness overhead are reduced, but manufacturing complexity increases
Solution Approach 1:
The patent employs a mask layer structure prepared in advance before the molding process. The mask layer is patterned to define the exact positions and shapes of components and chips, enabling precise placement and integration during molding. This preliminary preparation simplifies the subsequent molding process by providing clear guidelines for the molding material to follow, reducing manufacturing complexity despite the integrated design.
4Length of stationary object
If components and chips are integrated in the same mold body using direct exposed molding process, then thickness overhead is reduced, but manufacturing complexity increases
Solution Approach 1:
The mask layer structure is prepared in advance with precise thickness control and pattern definition. This preliminary action enables the direct exposed molding process to achieve thin, integrated packages without requiring complex multi-step manufacturing processes, as the mask layer guides the molding material to form the desired thin-profile integrated structure in a single step.
5Productivity
If mask layer structure and direct exposed molding process are used, then connection efficiency is improved by eliminating extra connections, but manufacturing precision requirements increase
Solution Approach 1:
The mask layer is prepared in advance with precise pattern definition and dimensional control, establishing the exact geometry and positioning for all components and chips. This preliminary precision work enables the subsequent molding process to achieve accurate interconnections without requiring excessively tight tolerances during molding, as the mask layer has already established the precise framework for component placement and connection routing.
Data Source
AI summary
According to an exemplary embodiment, a semiconductor package is provided. The semiconductor package includes at least one chip, and at least one component adjacent to the at least one chip, wherein the at least one chip and the at least one component are molded in a same molding body.


