Semiconductor Package Merged Dummy Pads Heat Dissipation
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving high heat dissipation performance while maintaining miniaturization and weight reduction, especially in stacked chip configurations.
Innovation Solution
The semiconductor package design includes merged dummy pads on the upper surface that cover multiple adjacent lower dummy pads, with metal plating layers on these pads to prevent conductive bumps from merging, and a non-conductive adhesive layer surrounding conductive bumps to enhance heat dissipation and alignment accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If merged dummy pads are used to cover multiple adjacent lower dummy pads, then heat dissipation performance is improved, but device complexity increases
Solution Approach 1:
Multiple adjacent lower dummy pads are merged into a single upper dummy pad structure, creating a larger pad area that spans across multiple underlying pads. This merging approach increases the effective heat dissipation area while managing the complexity through systematic design of the merged pad configuration.
Solution Approach 2:
The pad structure transitions from individual discrete pads to a merged pad that operates across multiple spatial dimensions, covering areas corresponding to multiple lower pads simultaneously. This dimensional approach allows heat dissipation to occur across a broader area without proportionally increasing structural complexity.
2Manufacturing precision
If metal plating layers are added on merged pads, then alignment accuracy is improved, but manufacturing complexity increases
Solution Approach 1:
Metal plating layers are pre-formed on the merged dummy pads before the bump formation process. This preliminary plating creates defined alignment references that guide subsequent manufacturing steps, improving alignment accuracy while allowing the plating process to be integrated into the existing manufacturing flow.
Solution Approach 2:
The metal plating layers serve as an intermediary element between the merged dummy pads and the conductive bumps. This intermediate layer provides a controlled interface that enhances alignment precision by creating distinct, measurable features for positioning the bumps accurately during assembly.
3Temperature
If non-conductive adhesive layer surrounds conductive bumps, then heat dissipation is improved, but device complexity increases
Solution Approach 1:
The non-conductive adhesive layer acts as an intermediary material that surrounds the conductive bumps, creating a thermal interface that facilitates heat dissipation. This adhesive layer fills the spaces between bumps and provides a thermal pathway while maintaining electrical isolation, thereby improving heat management without requiring additional complex cooling structures.
4Temperature
If pad area is expanded through merged pads, then heat dissipation performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
Multiple smaller pads are merged into a single larger dummy pad structure, which increases the total heat dissipation area. This merging approach allows the use of standard fabrication processes for forming the larger pad, thereby managing manufacturing precision requirements while achieving enhanced thermal performance through the combined area of multiple underlying pads.
Data Source
AI summary
A semiconductor package includes a first semiconductor chip including upper signal pads and upper dummy pads. A second semiconductor chip is on the first semiconductor chip, and includes lower signal pads and lower dummy pads. First conductive bumps are between the upper signal pads and the lower signal pads. Second conductive bumps are between the upper dummy pads and the lower dummy pads. The upper dummy pads include merged pads covering a plurality of adjacent lower dummy pads. A plurality of metal plating layers are disposed on each of the merged pads in areas respectively corresponding to the plurality of adjacent lower dummy pads. The second conductive bumps include a plurality of conductive bumps respectively disposed between the plurality of first metal plating layers and the plurality of adjacent lower dummy pads.