Semiconductor Package Microchannel Cooling for Dense Multi-Chip Layouts

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Solution Overview

Problem

The challenge of efficiently arranging multiple semiconductor chips within a limited-size semiconductor package while providing effective cooling to prevent overheating and thermal fatigue, which is crucial for advanced electronic devices with reduced size and increased functionality.

Innovation Solution

A semiconductor package design incorporating a package substrate, interposer, semiconductor chips, molding member, sealing member, and a heat dissipation member with microchannels and micropillars, utilizing ultrapure water as a coolant to facilitate efficient heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple semiconductor chips are arranged in a limited-size package, then integration density is improved, but heat dissipation becomes more difficult

Engineering Contradiction:
Improveintegration densityVSAvoidheat dissipation
Core Design Contradiction:
Quantity of substanceVSTemperature

Solution Approach 1:

The patent transitions from planar 2D chip arrangement to 3D stacked configuration, utilizing vertical space to increase integration density. Multiple chips are arranged in layers above and below the package substrate, with heat dissipation structures positioned between and around the stacks to manage thermal loads in three-dimensional space.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Heat dissipation structures serve as intermediary elements between the semiconductor chips and the package substrate. These structures include thermal interface materials, heat sinks, and cooling channels that mediate heat transfer from the chips to the substrate, enabling effective thermal management in high-density configurations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Temperature

If cooling system is added to semiconductor package, then thermal management is improved, but device complexity increases

Engineering Contradiction:
Improvethermal managementVSAvoiddevice complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The cooling system is merged with the package substrate structure itself. Heat dissipation structures are integrated directly into the substrate layers, and cooling channels are formed within the substrate thickness, combining thermal management functionality with the mechanical support structure to reduce overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The package substrate serves multiple functions simultaneously: it provides mechanical support for chip mounting, establishes electrical connections through conductive pathways, and manages heat dissipation through integrated cooling structures. This multi-functionality reduces the need for separate dedicated cooling components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves fast thermal response and excellent thermal transfer capacity, preventing overheating and thermal fatigue, allowing multiple chips to be efficiently arranged within a limited space, thereby enhancing the reliability and performance of electronic devices.

Implementation Method 1

a coolant transfer path extending between the coolant inlet port and the coolant outlet port and configured to thermally connect the coolant to a central portion of an upper surface of the first semiconductor chip and a central portion of an upper surface of the second semiconductor chip

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

the heat dissipation member includes a microchannel and a micropillar on the microchannel

Methodology Applied
Scientific EffectConvection: Convection

Data Source

PatentUS20260076197A1Semiconductor package and cooling system
Publication Date: 2026.03.12 SAMSUNG ELECTRONICS CO LTD
  • US20260076197A1 patent drawing
  • US20260076197A1 patent drawing
  • US20260076197A1 patent drawing

AI summary

A semiconductor package includes; a package substrate, an interposer disposed on the package substrate, semiconductor chips mounted on the interposer, a molding member on the interposer and surrounding the semiconductor chips, a first sealing member on the molding member, and a heat dissipation member on the package substrate and covering the interposer, the semiconductor chips, and the first sealing member, wherein the heat dissipation member includes a lower structure contacting an upper surface of the package substrate, and an upper structure on the lower structure, extending over the first sealing member, and including a microchannel and a micropillar on the microchannel.