Semiconductor Package Recovery Material for Mold Pit Planarity
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving smaller, more efficient packaging techniques for semiconductor devices as demand increases for miniaturization, higher speed, and lower power consumption, particularly in maintaining planarity and preventing shorts or breaks in wiring within stacked semiconductor devices.
Innovation Solution
The use of a recovery material, such as a polymer coating, is applied to fill pits in the molding material formed during CMP, grinding, or etch processes, improving planarity and preventing the formation of dielectric layers within these pits, thereby enhancing the reliability and yield of interconnect structures in packaged semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor devices are miniaturized and stacked to reduce physical size, then integration density and space utilization are improved, but planarity of the surface deteriorates due to pits formed during CMP, grinding, or etch processes
Solution Approach 1:
The recovery material is applied in advance to fill pits in the molding material before subsequent dielectric layer deposition and interconnect structure formation. This preliminary action prevents the pits from causing wiring shorts or breaks during later processing steps, resolving the planarity issue while maintaining miniaturization benefits
Solution Approach 2:
The recovery material acts as an intermediary substance between the uneven molding material surface and the subsequent dielectric layers. It provides a planarizing interface that enables proper formation of interconnect structures without requiring extensive surface preparation or sacrificing device density
2Device complexity
If pits in molding material are left unfilled, then manufacturing process complexity is reduced, but reliability of interconnect structures deteriorates due to shorts or breaks in wiring
Solution Approach 1:
The recovery material application is performed as a preliminary step before dielectric layer formation, preventing wiring defects before they occur. This approach maintains manufacturing simplicity while significantly improving interconnect reliability by addressing the pit issue proactively rather than reactively
Solution Approach 2:
The recovery material converts the harmful effect of pits (which cause wiring shorts or breaks) into a beneficial planar surface that facilitates reliable interconnect formation. The material transforms a manufacturing defect into an opportunity for improved product reliability
Data Source
AI summary
Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die and a first interconnect structure coupled to the integrated circuit die. Through-vias are also coupled to the first interconnect structure. A molding material is disposed around the integrated circuit die and the through-vias over the first interconnect structure. The molding material has a pit disposed therein. A recovery material is disposed within the pit in the molding material. A second interconnect structure is disposed over the molding material, the recovery material, the integrated circuit die, and the through-vias.