Semiconductor Package Encapsulation for Heat-Dissipating Molded Layers
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Solution Overview
Problem
The increasing heat generation in high-integration semiconductor chips due to reduced weight and enhanced performance of electronic devices leads to performance degradation, necessitating improved heat dissipation in semiconductor packages.
Innovation Solution
A method involving the simultaneous use of encapsulants with different properties, such as a first encapsulant with high thermal conductivity and a second encapsulant with excellent filling properties, is applied to form stacked encapsulating layers that enhance heat dissipation and manufacturing efficiency in semiconductor packages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a single encapsulant is used to encapsulate semiconductor chips, then the manufacturing process is simple, but heat dissipation performance is insufficient
Solution Approach 1:
The encapsulant is divided into multiple layers with different materials: a first encapsulant layer with high thermal conductivity for heat dissipation, and a second encapsulant layer with good filling properties for complete coverage. This segmentation allows each layer to perform its specialized function, resolving the contradiction between heat dissipation performance and manufacturing simplicity.
Solution Approach 2:
The patent uses composite encapsulant structure combining different materials with complementary properties. The first encapsulant contains thermally conductive fillers for heat dissipation, while the second encapsulant provides excellent filling and adhesion properties. This composite approach achieves superior heat dissipation without significantly complicating the manufacturing process.
2Temperature
If multiple encapsulants are used to improve heat dissipation, then heat dissipation performance improves, but manufacturing complexity increases
Solution Approach 1:
The patent combines the formation of multiple encapsulant layers into a single integrated molding process. Both the first and second encapsulants are injected and cured together in one manufacturing step, achieving complex multi-layer encapsulation without proportionally increasing manufacturing complexity. This merging approach maintains ease of manufacture while improving heat dissipation performance.
3Temperature
If the interface between encapsulating layers is positioned at the upper surface of semiconductor chips, then manufacturing is easier, but heat dissipation effectiveness is reduced
Solution Approach 1:
The patent positions the interface between the first and second encapsulants at a specific height below the upper surface of the semiconductor chips, creating local quality differentiation. This precise positioning allows the thermally conductive first encapsulant to be in direct contact with the chip for effective heat dissipation, while the second encapsulant provides protective coverage. The interface position is controlled within a specific range to optimize both heat dissipation and manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the productivity and reliability of semiconductor package manufacturing by effectively dissipating heat and ensuring strong adhesion between encapsulating layers, thereby maintaining chip performance.
Implementation Method 1
heating the first encapsulant and the second encapsulant to form a molded structure
Implementation Method 2
The first encapsulating layer may be formed by the first encapsulant flowing in a direction toward the lower mold
Implementation Method 3
The second encapsulating layer may be formed by the second encapsulant flowing toward the opposite sides of the injection hole
Implementation Method 4
forming a first encapsulating layer and a second encapsulating layer in which the first encapsulant and the second encapsulant are cured, respectively
Data Source
AI summary
A method of manufacturing a semiconductor package may include disposing, in a lower mold, a substrate strip in which a plurality of semiconductor chips are arranged in a horizontal direction, providing, in an upper mold, a release film to which a first encapsulant is attached, allowing the upper mold and the lower mold to be proximate to each other such that a first encapsulant is adjacent to an upper surface of each of the plurality of semiconductor chips, injecting a second encapsulant into a space between the upper mold and the lower mold, heating the first encapsulant and the second encapsulant to form a molded structure including a first encapsulating layer and a second encapsulating layer, allowing the upper mold and the lower mold to be spaced from each other such that the molded structure is separated from the release film, and cutting the molded structure.