Semiconductor Package Molding Layout for Uniform Surface and Heat Dissipation

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Solution Overview

Problem

Semiconductor packages face issues with surface roughness, heat dissipation, and strength due to variations in filler material content within the molding member, leading to visual differences and potential warpage.

Innovation Solution

A semiconductor package design featuring a first molding member with a higher filler material ratio on semiconductor chips and a second molding member with a lower filler material ratio between chips, formed using a compression mold process, which prevents visual variations and enhances heat dissipation and strength.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a release film is attached to the mold during compression molding, then the mold is protected from contamination, but the roughness of the release film causes variation in filler material content to be transferred to the molding member surface, resulting in visual variation

Engineering Contradiction:
Improvemold protectionVSAvoidsurface uniformity
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent applies different filler material ratios in different regions of the molding member. The first molding portion (covering semiconductor chips) has a higher filler material ratio (60-80 wt%) while the second molding portion (between chips) has a lower ratio (30-50 wt%). This local differentiation allows the surface under chips to have uniform appearance while the between-chip regions can accommodate the release film's roughness without visual variation.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the filler material concentration parameter across different regions of the molding member. By adjusting the filler material ratio from 30-50 wt% in the second molding portion to 60-80 wt% in the first molding portion, the surface properties are modified to prevent visual variation caused by release film roughness while maintaining mold protection functionality.

Inventive Principle:
Principle #35Parameter changes

2Shape

If filler material content is varied in different regions of the molding member, then visual variation is prevented, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvesurface uniformityVSAvoidmolding process complexity
Core Design Contradiction:
ShapeVSDevice complexity

Solution Approach 1:

The molding member is segmented into two distinct molding portions with different filler material ratios. The first molding portion (over chips) and second molding portion (between chips) are formed as separate regions during the compression molding process, allowing independent optimization of each region's properties while using a single molding operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The single compression molding process serves multiple functions: it forms both the first and second molding portions with different filler material ratios, protects the mold from contamination, and prevents visual variation on the surface. This multi-functionality is achieved by strategically placing semiconductor chips on the mold surface before molding.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If a single molding member covers all regions, then manufacturing is simplified, but heat dissipation and strength characteristics are compromised

Engineering Contradiction:
Improvemolding process simplicityVSAvoidheat dissipation
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The molding member provides locally optimized properties through different filler material ratios in different regions. The first molding portion with higher filler content (60-80 wt%) offers enhanced strength and heat dissipation where semiconductor chips are mounted, while the second molding portion with lower filler content (30-50 wt%) provides adequate protection between chips without compromising overall performance.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20240055307A1Semiconductor package and method of manufacturing semiconductor package
Publication Date: 2024.02.15 SAMSUNG ELECTRONICS CO LTD
  • US20240055307A1 patent drawing
  • US20240055307A1 patent drawing
  • US20240055307A1 patent drawing

AI summary

A semiconductor package includes a package substrate, a first semiconductor chip and a second semiconductor chip on the package substrate in adjacent, spaced-apart relationship, a first molding member on the package substrate and covering the first semiconductor chip and the second semiconductor chip, and a second molding member on the first molding member. The first molding member includes a first molding portion on the first semiconductor chip and a second molding portion between the first and second semiconductor chips. A ratio per unit volume of filler material included in the first molding portion is greater than a ratio per unit volume of filler material included in the second molding portion.