Semiconductor Package Bump Layout for Circuit Noise Shielding
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Solution Overview
Problem
Semiconductor packages face challenges in structural reliability due to noise coupling in circuit structures disposed on metal layers, which affects the operating speed and storage capacity of semiconductor devices.
Innovation Solution
A semiconductor package design featuring a substrate with first and second patterns, where first bumps with an elongated shape are positioned adjacent to a region overlapping the circuit structure, electrically connected to ground or power patterns, effectively shielding the circuit structure from noise by surrounding it and reducing noise coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the operating speed and storage capacity of semiconductor devices are increased, then the performance of electronic devices is improved, but the structural reliability of the semiconductor devices may be impacted due to noise coupling
Solution Approach 1:
The patent introduces an intermediary shielding structure (ground shield pattern) between the circuit structure and external environment to block noise coupling. This ground shield acts as a mediator that prevents harmful electromagnetic interference from reaching the high-speed circuit, thereby maintaining reliability while allowing high operating speeds
Solution Approach 2:
The patent converts the harmful noise coupling effect into a beneficial shielding effect by strategically placing ground patterns and bumps that utilize electromagnetic field principles to create protective zones around the circuit structure, transforming potential interference into a protective mechanism
2Weight of moving object
If the semiconductor packages are made thin and light, then the portability is improved, but the structural reliability may be compromised
Solution Approach 1:
The patent applies local quality enhancement by concentrating shielding resources (ground patterns and bumps) specifically at critical areas where noise coupling occurs, rather than uniformly throughout the package. This allows effective noise shielding in thin packages by focusing protection where most needed
Solution Approach 2:
The patent transitions from planar shielding approaches to three-dimensional shielding by utilizing vertical bump structures that extend upward from the substrate, creating protective zones in the vertical dimension and enabling effective noise shielding in thin-profile packages
Data Source
AI summary
Provided is a semiconductor package including a first substrate, a first pattern and a second pattern disposed on the first substrate, a semiconductor chip disposed on the first substrate and including a metal layer, a circuit structure disposed on the metal layer of the semiconductor chip, and a plurality of first bumps disposed between the first substrate and the semiconductor chip and electrically connected to the first pattern, wherein the first pattern includes a ground pattern or a power pattern, the first substrate includes a first region overlapping the circuit structure in a vertical direction, the plurality of first bumps are disposed adjacent to the first region on a top surface of the first substrate, and a first bump of the plurality of first bumps has an elongated shape substantially parallel to an adjacent side of the first region.