Semiconductor Package with Embedded Die and Non-Parallel Current Paths

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Solution Overview

Problem

Existing semiconductor packages face challenges in achieving both good electrical and thermal performance while being cost-effectively manufactured, with limitations in reducing package resistance and optimizing current flow paths.

Innovation Solution

The semiconductor package design includes a semiconductor die embedded in a dielectric layer with strategically arranged contact pads and a redistribution structure featuring a lateral and vertical portion, allowing for multiple non-parallel current paths and increased effective cross-sectional area, which reduces package resistance and enhances thermal dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional single-path current flow design is used, then package structure is simple, but package resistance is high and thermal performance is poor

Engineering Contradiction:

Improveelectrical and thermal performanceVSAvoidpackage structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The current flow path is segmented into multiple parallel paths by dividing the contact pads into first and second contact pads on opposite surfaces of the semiconductor die. This segmentation creates multiple current flow routes through the package, reducing overall package resistance and improving thermal performance while maintaining a relatively simple package structure.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention transitions from a single-plane current flow to a three-dimensional current distribution by placing contact pads on opposite surfaces of the semiconductor die. This dimensional change enables current to flow through the thickness of the die and package, creating multiple non-parallel current paths that reduce resistance and improve thermal management.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple non-parallel current paths are implemented, then package resistance is reduced by 60-70%, but manufacturing complexity increases

Engineering Contradiction:

Improvepackage resistanceVSAvoidmanufacturing process

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The semiconductor die is embedded in the dielectric layer at an intermediate stage of package manufacturing, before the housing is formed. This preliminary positioning of the die with its contact pads allows subsequent formation of multiple current paths through the housing and contact pads without requiring complex post-assembly modifications, thus reducing manufacturing complexity.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The housing serves multiple functions: it provides mechanical protection, establishes multiple current flow paths through integrated contact pads, and facilitates thermal management. This multi-functionality reduces the need for separate components and simplifies the overall manufacturing process while achieving low package resistance.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Ease of manufacture

If current flow is concentrated in single path, then manufacturing is easier, but ohmic losses and overheating risk increase

Engineering Contradiction:

Improvecurrent path designVSAvoidohmic losses

Core Design Contradiction:

Ease of manufactureVSLoss of energy

Solution Approach 1:

The current flow is segmented into multiple parallel paths by dividing contact pads into first and second contact pads on opposite surfaces. This segmentation distributes current across multiple routes, reducing current density in any single path, minimizing ohmic losses, and preventing localized overheating while maintaining ease of manufacture.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively reduces package resistance by up to 60-70% and improves thermal performance by distributing current flow homogeneously, minimizing ohmic losses and the risk of overheating during high current passage.

Implementation Method 1

the current is laterally distributed and flows in the lateral layer of the redistribution structure between the second contact pad and the through package vias in two laterally opposing directions

Methodology Applied

Scientific EffectElectrical Conduction: Conduction (electrical)

Implementation Method 2

improves thermal performance by distributing current flow homogeneously, minimizing ohmic losses and the risk of overheating during high current passage

Methodology Applied

Scientific EffectThermal Conduction: Conduction (thermal)

Data Source

PatentUS11348861B2Semiconductor package and method of manufacturing a semiconductor package

Publication Date: 2022.05.31 INFINEON TECH AUSTRIA AG

AI summary

A semiconductor package includes a semiconductor die having a semiconductor device, and first and second contact pads arranged on opposite surfaces of the die. The semiconductor die is embedded in a dielectric layer. The semiconductor package also includes one or more first package contact pads and one or more second package contact pads arranged on a first major surface of the semiconductor package. The first contact pad of the die is coupled to the one or more first package contact pads, and the second contact pad of the die is coupled to the one or more second package contact pads. In operation, the semiconductor device causes a current path between the first contact pad and the second contact pad. The package contact pads are arranged on the first major surface of the semiconductor package to provide multiple non-parallel current paths.