Semiconductor Package Open-Mold Structure for Warpage Relief

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Solution Overview

Problem

Existing semiconductor device packaging technologies face challenges in effectively managing warpage and thermal dissipation while maintaining compact size and structural integrity during wafer-level packaging processes.

Innovation Solution

A package structure design where a molding layer is formed with openings or extended portions to expose the top surface of semiconductor elements, allowing for improved heat dissipation and reduced warpage by creating air gaps and increased structural support.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a molding layer is formed to cover semiconductor elements for protection and encapsulation, then structural integrity and protection are improved, but warpage increases and thermal dissipation is hindered

Engineering Contradiction:
Improvestructural integrityVSAvoidwarpage
Core Design Contradiction:
StrengthVSStability of the object's composition

Solution Approach 1:

The molding layer is segmented by forming openings or removing portions of the molding material, creating a divided structure that allows the semiconductor element top surface to be exposed. This segmentation reduces the continuous constraining force that causes warpage while maintaining protection in other areas.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The molding layer is configured with different properties in different regions: it covers and protects the semiconductor elements on the front surface while leaving the top surface exposed through openings. This local differentiation allows simultaneous achievement of protection, warpage reduction, and thermal dissipation.

Inventive Principle:
Principle #3Local quality

2Strength

If a molding layer is formed to encapsulate semiconductor elements for protection, then structural integrity is improved, but thermal dissipation deteriorates

Engineering Contradiction:
Improvestructural integrityVSAvoidthermal dissipation
Core Design Contradiction:
StrengthVSTemperature

Solution Approach 1:

The molding layer is divided by creating openings that expose the top surface of semiconductor elements. This segmentation creates thermal pathways through the openings that facilitate heat dissipation while the surrounding molding material continues to provide structural protection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The openings in the molding layer act as intermediaries that facilitate thermal transfer from the semiconductor elements to the external environment, improving heat dissipation while the molding layer itself maintains structural integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If semiconductor elements are fully covered by molding material for protection, then ease of manufacture is improved, but device complexity increases due to warpage management

Engineering Contradiction:
Improveencapsulation processVSAvoidwarpage control
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The openings in the molding layer are formed in advance during the molding process itself, rather than requiring subsequent complex processing steps. This preliminary action simplifies manufacturing by integrating the warpage control feature into the primary encapsulation process.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves reduced warpage by up to 35% and enhanced thermal dissipation, resulting in a more compact and stable semiconductor package structure.

Implementation Method 1

A top surface of the molding layer is higher than a top surface of the first semiconductor element. The molding layer has an opening extending from the top surface of the molding layer to the top surface of the first semiconductor element to expose the top surface of the first semiconductor element.

Methodology Applied
Scientific EffectThermal dissipation: Convection

Data Source

PatentUS12354997B2Package structure and manufacturing method thereof
Publication Date: 2025.07.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12354997B2 patent drawing
  • US12354997B2 patent drawing
  • US12354997B2 patent drawing

AI summary

A package structure including a substrate, a first semiconductor element disposed on and electrically connected with the substrate, a second semiconductor element disposed on and electrically connected with the substrate and a molding layer disposed over the substrate and covering at least a top surface of the substrate. The second semiconductor element and the first semiconductor element perform different functions. The molding layer encapsulates the second semiconductor element and wraps around sidewalls of the first semiconductor element. A top surface of the molding layer is higher than a top surface of the first semiconductor element. The molding layer has an opening extending from the top surface of the molding layer to the top surface of the first semiconductor element, so that the top surface of the first semiconductor element is exposed.