Semiconductor Package Optical Guide Layout for Low-Loss Light Concentration
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Solution Overview
Problem
Existing semiconductor packages face challenges in reducing size and weight while maintaining effective light concentration and minimizing optical loss and noise.
Innovation Solution
A semiconductor package design that includes a package substrate, a connection substrate, first and second semiconductor chips, a molding layer, and an optical guide member. The optical guide member is strategically positioned to produce total reflection, minimizing optical loss and reducing optical noise by concentrating light efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Weight of moving object
If the package size is reduced to meet portable device requirements, then weight and dimensions are improved, but light concentration capability deteriorates
Solution Approach 1:
The optical guide member is integrated within the molding layer that encapsulates the semiconductor chips, creating a nested structure where the optical component is embedded in the packaging material. This allows light guiding functionality to be incorporated without adding external components that would increase package size or weight.
Solution Approach 2:
The optical guide member extends in the vertical dimension through the molding layer rather than requiring lateral space. By utilizing the depth dimension of the package, the design achieves effective light concentration without increasing the planar footprint, thus maintaining compactness while improving optical performance.
2Device complexity
If conventional packaging is used without optical guide members, then device complexity is reduced, but optical loss increases
Solution Approach 1:
The optical guide member acts as an intermediary component between the light source and the target area, mediating light transmission through total internal reflection. This single intermediate element effectively reduces optical loss without requiring complex multi-component optical systems.
Solution Approach 2:
The molding layer's refractive index is selected to create appropriate total internal reflection conditions at the optical guide member interfaces. By controlling this material parameter, the design achieves efficient light guidance with minimal optical loss while keeping the overall structure simple.
3Illumination intensity
If optical guide members are added to improve light concentration, then light concentration capability is improved, but manufacturing complexity increases
Solution Approach 1:
The optical guide member is integrated with the molding layer in a single manufacturing step, combining the encapsulation and optical guiding functions into one process. This merging of functions avoids separate assembly steps for adding optical components, thereby maintaining manufacturing simplicity while achieving improved light concentration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed semiconductor package achieves increased light concentration efficiency, reducing optical loss and noise, and enabling a more compact and efficient design for portable electronic devices.
Implementation Method 1
an optical guide member that extends into the molding layer and is disposed on the second semiconductor chip
Data Source
AI summary
The present application is directed to a semiconductor package including a package substrate, a connection substrate disposed on the package substrate, a first semiconductor chip disposed on the connection substrate, a second semiconductor chip disposed on the connection substrate and spaced apart from the first semiconductor chip, a molding layer disposed on the package substrate and at least partially covering the connection substrate, the first semiconductor chip, and the second semiconductor chip, and an optical guide member that extends into the molding layer and is disposed on the second semiconductor chip.