Semiconductor Package Layout for Optical I/O and Heat Isolation

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Solution Overview

Problem

Existing semiconductor packages face challenges in achieving high integration, efficient heat dissipation, and reliable optical transmission while maintaining compact size and reducing manufacturing costs.

Innovation Solution

A semiconductor package design incorporating a redistribution layer with a heat dissipation layer and optical transport layer, along with a heat blocking layer, to efficiently radiate heat and transmit light, and to transmit optical signals, and a method of manufacturing the same using a glass carrier.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high integration is achieved by incorporating multiple semiconductor chips and photonic integrated circuits in a compact package, then device functionality and processing power are improved, but heat generation increases making heat dissipation difficult

Engineering Contradiction:
Improveintegration speedVSAvoidheat generation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The package is divided into distinct functional zones: a first region containing semiconductor chips for high-performance computing and a second region containing photonic integrated circuits for optical communication. This spatial segmentation allows different components to operate in optimized environments while managing heat distribution across the package.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A redistribution layer is introduced as an intermediary structure between the semiconductor chips and the substrate. This layer serves multiple functions: electrical interconnection, thermal management, and mechanical support. The redistribution layer includes thermal via holes that act as heat transfer pathways, effectively mediating between the heat-generating chips and the heat-dissipating substrate.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If photonic integrated circuits are added to enable optical interconnection for high-speed communication, then data transmission speed is improved, but the package structure becomes more complex

Engineering Contradiction:
Improvedata transmission speedVSAvoidpackage structure
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The photonic integrated circuit is merged with the semiconductor chip assembly in a unified package structure. The PIC is positioned adjacent to the semiconductor chips on the same substrate, sharing common interconnection layers and thermal management infrastructure. This merging approach enables optical interconnection functionality while avoiding the complexity of separate photonic modules.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The redistribution layer is designed as a multi-functional universal structure that serves the semiconductor chips, photonic integrated circuit, and substrate simultaneously. It provides electrical routing, optical signal transmission pathways, and thermal conduction channels, eliminating the need for separate dedicated layers for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If multiple layers are added to transmit optical signals and dissipate heat, then optical transmission and heat dissipation performance are improved, but manufacturing complexity increases

Engineering Contradiction:
Improveoptical transmission performanceVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The redistribution layer is designed as a multi-functional universal structure that serves the semiconductor chips, photonic integrated circuit, and substrate simultaneously. It provides electrical routing, optical signal transmission pathways, and thermal conduction channels, eliminating the need for separate dedicated layers for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Thermal via holes are introduced as vertical three-dimensional structures penetrating through the redistribution layer to the substrate. This vertical dimension provides direct heat conduction pathways from the chip level to the substrate level, enabling efficient thermal management without adding lateral complexity to the package structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enhances space efficiency, improves cooling efficiency, reduces thermal coupling, and lowers manufacturing costs by forming an optical transmission path through a layer structure.

Implementation Method 1

The layer structure may radiate heat generated from the first semiconductor chip to an outside

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

The layer structure may radiate heat generated from the first semiconductor chip to an outside

Methodology Applied
Scientific EffectThermal radiation: Thermal Radiation

Implementation Method 3

The layer structure may transmit light incident from the outside to the PIC

Methodology Applied
Scientific EffectOptical transmission: Light

Implementation Method 4

A semiconductor package with improved space efficiency by forming an optical transmission path through a layer structure

Methodology Applied
Scientific EffectTotal internal reflection: Total Internal Reflection

Data Source

PatentUS20260003143A1Semiconductor package and method of manufacturing the same
Publication Date: 2026.01.01 SAMSUNG ELECTRONICS CO LTD
  • US20260003143A1 patent drawing
  • US20260003143A1 patent drawing
  • US20260003143A1 patent drawing

AI summary

A semiconductor package includes a redistribution layer, a first semiconductor chip arranged on one surface of the redistribution layer, a photonic integrated circuit (PIC) arranged on one side of the first semiconductor chip on the redistribution layer, and a layer structure arranged on the first semiconductor chip and the PIC. The layer structure may radiate heat generated in the first semiconductor chip to an outside and transmit light incident from the outside to the PIC. Alternatively, the layer structure may transmit light generated in the PIC to the outside.