Semiconductor Package Layout for Optical Isolation and Current Spreading
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Solution Overview
Problem
Semiconductor device packages face challenges in achieving improved contrast ratio and current spreading, particularly in light-emitting devices where optical interference and electrical characteristics are affected by the spacing and structure of multiple chips.
Innovation Solution
A semiconductor device package design featuring a substrate with semiconductor structures having a specific conductivity-type layers and an active layer, where the maximum height of the outermost surface of the first conductivity-type semiconductor layer to the separation distance between adjacent structures is optimized within a range of 1:3 to 1:60, and an intermediate layer is used to reduce optical interference and enhance contrast ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple chips are disposed close to each other to appear as one light source, then the device can be used as a headlight with multiple independently controllable chips, but optical interference occurs between adjacent chips
Solution Approach 1:
An intermediate layer is introduced between adjacent semiconductor structures to prevent optical interference. This intermediate layer acts as a mediator that blocks or absorbs stray light from one chip while allowing the desired light output, enabling multiple chips to be disposed close together without optical interference.
2Adaptability or versatility
If multiple small-sized chips are disposed to improve contrast ratio through independent on/off control, then versatility is enhanced, but improving contrast ratio becomes difficult due to spacing requirements
Solution Approach 1:
The intermediate layer enables chips to be disposed closer together by preventing optical interference, which allows the device to achieve both independent chip control and improved contrast ratio simultaneously.
Solution Approach 2:
The intermediate layer is selectively positioned between adjacent semiconductor structures to provide localized optical isolation, allowing each chip to maintain its light output characteristics while preventing interference with neighboring chips.
3Reliability
If the height of the first conductivity-type semiconductor layer is increased to improve current spreading, then electrical characteristics are enhanced, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent specifies a particular height range for the first conductivity-type semiconductor layer (1 μm to 3 μm) to optimize current spreading while maintaining manufacturability. This parameter optimization balances electrical performance with device complexity and manufacturing ease.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances the contrast ratio and current spreading, preventing optical interference and maintaining electrical characteristics by controlling the height and spacing of semiconductor structures and using an intermediate layer to block unwanted light emission.
Implementation Method 1
an intermediate layer is used to reduce optical interference and enhance contrast ratio
Data Source
AI summary
Disclosed in an embodiment is a semiconductor device package comprising a substrate and a plurality of semiconductor structures arranged to be spaced apart at the center of the substrate, wherein the semiconductor structure is arranged on the substrate and includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer arranged between the first conductive type semiconductor layer and the second conductive type semiconductor layer, and the ratio of the maximum height of the outermost surface of the first conductive type semiconductor layer to the length of the spacing distance between the adjacent semiconductor structures is 1:3 to 1:60.