Semiconductor Package Redistribution Pad Structure for Stable Connectivity
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving improved electrical characteristics due to limitations in the design and fabrication of redistribution substrates, which affect the connectivity and reliability of semiconductor chips.
Innovation Solution
The semiconductor package incorporates a first redistribution substrate with a semiconductor chip, a molding layer, and a second redistribution substrate featuring a dielectric layer with specific openings and a redistribution pad configuration that enhances electrical connectivity through a conductive pad and redistribution pattern, allowing for increased area arrangement and reduced size, while using a seed pad and bonding pads to form a stable connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional redistribution substrate design is used, then the fabrication process is simple, but the electrical characteristics and connectivity are limited
Solution Approach 1:
The redistribution substrate is divided into multiple functional layers including a dielectric layer, conductive pad, and redistribution pad with specific opening structures. This segmentation allows each layer to perform its specialized function, improving electrical characteristics while maintaining manufacturability through modular fabrication processes.
Solution Approach 2:
The patent introduces a three-dimensional opening structure with varying widths (narrower at the bottom, wider at the top) rather than a simple planar connection. This dimensional change enables better electrical connectivity and signal distribution by creating optimized current paths and reducing interference, thereby improving electrical characteristics without proportionally increasing fabrication complexity.
2Reliability
If the redistribution pad area is increased to improve connectivity, then the electrical characteristics improve, but the package size increases
Solution Approach 1:
The opening structure is nested within the dielectric layer, with the conductive pad positioned at the bottom and the redistribution pad extending upward. This nested configuration allows the pads to be vertically stacked rather than horizontally spread, improving connectivity through the vertical opening path while minimizing the horizontal package footprint.
Solution Approach 2:
The patent transitions from a two-dimensional planar pad layout to a three-dimensional vertical opening structure. By utilizing the vertical dimension with an opening that extends through the dielectric layer, the design achieves enhanced connectivity and signal distribution without requiring proportional increases in the horizontal package area.
3Reliability
If additional components like plating bars are used to ensure stable connections, then the reliability improves, but the device complexity and fabrication steps increase
Solution Approach 1:
The conductive pad and redistribution pad are merged into a continuous conductive structure that extends through the opening in the dielectric layer. This integration eliminates the need for separate plating bars or intermediate connection components, achieving stable electrical connections through a unified pad structure that simplifies the fabrication process while maintaining connection reliability.
Solution Approach 2:
The patent extracts and eliminates unnecessary intermediate components such as plating bars from the connection structure. By directly forming the conductive pad and redistribution pad as integrated elements within the opening, the design achieves stable connections without the added complexity of additional components, thereby simplifying manufacturing.
Data Source
AI summary
A semiconductor package includes a semiconductor chip on a first redistribution substrate, a molding layer that covers the semiconductor chip, and a second redistribution substrate on the molding layer and that includes a dielectric layer, a redistribution pattern, and a conductive pad. The dielectric layer includes a lower opening that exposes the conductive pad, and an upper opening connected to the lower opening and that is wider than the lower opening. The semiconductor package also comprises a redistribution pad on the conductive pad and that covers a sidewall of the lower opening and a bottom surface of the upper opening. A top surface of the dielectric layer is located at a higher level than a top surface of the redistribution pad. The top surface of the redistribution pad is located on the bottom surface of the upper opening.