Semiconductor Package Pad Structure for Stable Fine-Pitch Solder Connections

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Solution Overview

Problem

Existing semiconductor packages face challenges in achieving a high degree of integration and reliability of electrical connection paths due to the decreasing size and increasing complexity of pads, which affects the stability and efficiency of electrical connections.

Innovation Solution

The semiconductor package includes an insulating layer surrounding first and second pads with solders in between, margin portions providing lateral space, and an underfill on the insulating layer surface, ensuring stable vertical compression and increased contact area of the solders, thereby enhancing the integration and reliability of electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the width or pitch of pads is decreased to increase integration, then the degree of integration of electrical connection paths increases, but the reliability of electrical connections deteriorates

Engineering Contradiction:
Improvedegree of integrationVSAvoidreliability of electrical connections
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The pad structure is segmented into multiple functional layers: the pad itself, margin portions surrounding the pad, and underfill material filling the space between adjacent pads. This segmentation allows each component to perform its specific function - the pad provides electrical connection, the margin portions provide mechanical support and prevent solder overflow, and the underfill provides additional structural stability - thereby maintaining connection reliability even as pad size decreases for higher integration

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The margin portions and underfill material act as preventive protective structures formed beforehand to prevent potential connection failures. The margin portions surround the pads to prevent solder overflow during the bonding process, while the underfill material fills the spaces between pads to prevent mechanical stress and delamination, thus cushioning against reliability issues before they occur

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Quantity of substance

If the width or pitch of pads is decreased to increase integration, then the degree of integration of electrical connection paths increases, but the stability of electrical connections deteriorates

Engineering Contradiction:
Improvedegree of integrationVSAvoidstability of electrical connections
Core Design Contradiction:
Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The connection structure is divided into stable foundational elements (margin portions and underfill) that support the smaller, more integrated pads. This segmentation provides a stable framework that maintains connection stability even as the pads themselves become smaller and more densely packed

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the package are given different properties: the margin portions provide mechanical support and structural stability around each pad, while the underfill material provides bulk structural support between pads. This local differentiation of properties ensures that stability-critical areas have enhanced structural characteristics, compensating for the reduced size of individual connection paths

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves the degree of integration and reliability of electrical connection paths by stabilizing the contact area of solders, reducing the risk of overflow, and maintaining impedance stability and signal integrity.

Implementation Method 1

second pads electrically connected to the first pads; solders between and connected to the first pads and the second pads... an underfill on an upper surface of the insulating layer and surrounding each of the second pads, wherein a level of lower surfaces of the second pads is lower than a level of the upper surface of the insulating layer

Methodology Applied
Scientific EffectCompression: Compression

Implementation Method 2

an underfill on an upper surface of the insulating layer and surrounding each of the second pads

Methodology Applied
Scientific EffectPhysical support: Mechanical Force

Implementation Method 3

an insulating layer; first pads respectively surrounded by the insulating layer

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS20250219000A1Semiconductor package
Publication Date: 2025.07.03 SAMSUNG ELECTRONICS CO LTD
  • US20250219000A1 patent drawing
  • US20250219000A1 patent drawing
  • US20250219000A1 patent drawing

AI summary

A semiconductor package includes an insulating layer; first pads respectively surrounded by the insulating layer; second pads electrically connected to the first pads; solders between and connected to the first pads and the second pads, and respectively surrounded by the insulating layer, and margin portions including an insulating material, surrounding the solders, and respectively surrounded by the insulating layer.